Hi Graeme,
On Thu, Oct 18, 2012 at 9:12 PM, Graeme Russ <graeme.r...@gmail.com> wrote:
> Hi Simon,
>
> On Fri, Oct 19, 2012 at 2:45 PM, Simon Glass <s...@chromium.org> wrote:
>> Enable AHCI driver for Intel SATA devices.
>>
>> Signed-off-by: Simon Glass <s...@chromium.org>
>> ---
>> include/configs/coreboot.h | 21 +++++++++++++++++++++
>> 1 files changed, 21 insertions(+), 0 deletions(-)
>>
>> diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
>> index 3df085b..968a9c5 100644
>> --- a/include/configs/coreboot.h
>> +++ b/include/configs/coreboot.h
>> @@ -45,6 +45,27 @@
>> #undef CONFIG_WATCHDOG
>> #undef CONFIG_HW_WATCHDOG
>>
>> +/* SATA AHCI storage */
>> +
>> +#define CONFIG_SCSI_AHCI
>> +
>> +#ifdef CONFIG_SCSI_AHCI
>> +#define CONFIG_SATA_INTEL 1
>> +#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
>> + PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
>> + {PCI_VENDOR_ID_INTEL, \
>> + PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
>> + {PCI_VENDOR_ID_INTEL, \
>> + PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
>> + {PCI_VENDOR_ID_INTEL, \
>> + PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
>
> This implies every coreboot board is Intel. When you start to
> introduce hardware specific U-Boot components, you need to introduce a
> board specific config file.
>
> Would it be better to have a CONFIG_X86_COREBOOT and a coreboot 'SoC'
> and no coreboot board?
I am not sure about using the SOC - after all we might need that
concept soon on x86. Maybe we should create a new board config that
includes coreboot.h?
Having said that I'm not sure how important it is right now. So far,
coreboot.h is actually a particular class of boards, all Intel based.
We can name it whatever we want when we actually have other boards
which are coreboot but not Intel. Up to you....
Regards,
SImon
>
> Regards,
>
> Graeme
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