From: Stephen Warren <swar...@nvidia.com> The SPL has grown. Increase CONFIG_SYS_TEXT_BASE so SPL's BSS does not overlap the main U-Boot.
Signed-off-by: Stephen Warren <swar...@nvidia.com> --- include/configs/tegra20-common.h | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index dc7444d..ced278d 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -168,7 +168,7 @@ #define PHYS_SDRAM_1 NV_PA_SDRC_CS0 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_TEXT_BASE 0x0010c000 +#define CONFIG_SYS_TEXT_BASE 0x0010d000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE -- 1.7.0.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
