Hi Graeme,
On Wed, Oct 3, 2012 at 6:12 PM, Graeme Russ <graeme.r...@gmail.com> wrote:
> Hi Simon,
>
> On Thu, Oct 4, 2012 at 10:39 AM, Simon Glass <s...@chromium.org> wrote:
>> From: Stefan Reinauer <reina...@chromium.org>
>>
>> coreboot.c and coreboot_pci.c don't contain board specific but only
>> coreboot specific code. Hence move it to the coreboot directory in
>> arch/x86/cpu (which should probably be moved out of cpu/ in another
>> commit)
>
> You are right - this PCI code needs to move to arch/x86/lib but the
> naming will clash with the existing arch/x86/lib/pci.c (which is
> 16-bit PCI BIOS stuff)
>
> Right, OK... It's about time I said this - All 16-bit code in U-Boot
> after the reset vector and protected mode switch is crap!
>
> I did do a whole heap of work to enable U-Boot to boot Linux without
> the stupid BIOS stub. That work expanded upon what the coreboot guys
> have done and went so far as to strip the protected-mode and real-mode
> header components of the bzImage out. The vendor of the board I was
> working on lost interest and the project lost momentum and it all got
> too hard :(
>
> But anyway - You will get no resistance from me if you want to take to
> the 16-bit code with a flame thrower (I'll even dig up my old patches,
> but that may take a little time)
Hmm ok. So, should we look at moving pci.c into lib/ now (and renaming
it). Or leave that until later?
Not sure about removing all the 16-bit code. Are there really no users?
Regards,
Simon
>
> Regards,
>
> Graeme
>
>>
>> Signed-off-by: Stefan Reinauer <reina...@chromium.org>
>> Signed-off-by: Simon Glass <s...@chromium.org>
>> ---
>> arch/x86/cpu/coreboot/Makefile | 2 ++
>> .../x86/cpu}/coreboot/coreboot.c | 0
>> .../coreboot_pci.c => arch/x86/cpu/coreboot/pci.c | 0
>> board/chromebook-x86/coreboot/Makefile | 2 --
>> 4 files changed, 2 insertions(+), 2 deletions(-)
>> rename {board/chromebook-x86 => arch/x86/cpu}/coreboot/coreboot.c (100%)
>> rename board/chromebook-x86/coreboot/coreboot_pci.c =>
>> arch/x86/cpu/coreboot/pci.c (100%)
>>
>> diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
>> index 13f5f8a..fbf5a00 100644
>> --- a/arch/x86/cpu/coreboot/Makefile
>> +++ b/arch/x86/cpu/coreboot/Makefile
>> @@ -33,10 +33,12 @@ include $(TOPDIR)/config.mk
>>
>> LIB := $(obj)lib$(SOC).o
>>
>> +COBJS-$(CONFIG_SYS_COREBOOT) += coreboot.o
>> COBJS-$(CONFIG_SYS_COREBOOT) += tables.o
>> COBJS-$(CONFIG_SYS_COREBOOT) += ipchecksum.o
>> COBJS-$(CONFIG_SYS_COREBOOT) += sdram.o
>> COBJS-$(CONFIG_SYS_COREBOOT) += sysinfo.o
>> +COBJS-$(CONFIG_PCI) += pci.o
>>
>> SOBJS-$(CONFIG_SYS_COREBOOT) += coreboot_car.o
>>
>> diff --git a/board/chromebook-x86/coreboot/coreboot.c
>> b/arch/x86/cpu/coreboot/coreboot.c
>> similarity index 100%
>> rename from board/chromebook-x86/coreboot/coreboot.c
>> rename to arch/x86/cpu/coreboot/coreboot.c
>> diff --git a/board/chromebook-x86/coreboot/coreboot_pci.c
>> b/arch/x86/cpu/coreboot/pci.c
>> similarity index 100%
>> rename from board/chromebook-x86/coreboot/coreboot_pci.c
>> rename to arch/x86/cpu/coreboot/pci.c
>> diff --git a/board/chromebook-x86/coreboot/Makefile
>> b/board/chromebook-x86/coreboot/Makefile
>> index cfcc0df..2bddf04 100644
>> --- a/board/chromebook-x86/coreboot/Makefile
>> +++ b/board/chromebook-x86/coreboot/Makefile
>> @@ -32,8 +32,6 @@ include $(TOPDIR)/config.mk
>>
>> LIB = $(obj)lib$(BOARD).o
>>
>> -COBJS-y += coreboot.o
>> -COBJS-$(CONFIG_PCI) += coreboot_pci.o
>> SOBJS-y += coreboot_start16.o
>> SOBJS-y += coreboot_start.o
>>
>> --
>> 1.7.7.3
>>
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