Sorry Stefano,
On 09/24/2012 08:02 AM, Stefano Babic wrote:
On 22/09/2012 00:53, Eric Nelson wrote:
Adds support for two LVDS panels and one RGB panel to the SABRE-Lite
board:
Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480)
Auto-detects panel by probing the I2C touch controller of each.
Setting 'panel' environment variable to one of the names above will override
auto-detection.
Signed-off-by: Eric Nelson<eric.nel...@boundarydevices.com>
---
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 245 ++++++++++++++++++++++++-
drivers/video/ipu_common.c | 2 +-
include/configs/mx6qsabrelite.h | 15 ++-
3 files changed, 259 insertions(+), 3 deletions(-)
Between V3 and V4 you changed also ipu_common.c, and that change does
not apply.
/* address of boot parameters */
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index cc8f881..5f0a1a8 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -218,7 +218,7 @@ static struct clk ipu_clk = {
#else
.enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR3)),
- .enable_shift = MXC_CCM_CCGR3_IPU1_IPU_DI0_OFFSET,
+ .enable_shift = MXC_CCM_CCGR3_IPU1_IPU_MASK,
But in ipu_common.c:
.enable_reg = (u32 *)(CCM_BASE_ADDR +
offsetof(struct mxc_ccm_reg, CCGR5)),
.enable_shift = MXC_CCM_CCGR5_CG5_OFFSET,
CCGR5/CG5 is the IPU clock on i.MX5x, not i.MX6x.
I do not see another patch changing that. Am I missing something ?
This patch requires the previous change to name the CCGRx bitfields:
http://patchwork.ozlabs.org/patch/185856/
Regards,
Eric
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