Dear Stephen Warren,

> Commit 86c6326 "ARM: arm1176: enable instruction cache in
> arch_cpu_init()" defined arch_cpu_init() in a file that is shared across
> all arm1176 SoCs. tnetv107x already implemented this function, which
> caused linking to break. Move the new conflicting arch_cpu_init() into
> arm1176/bcm2835/init.c so that it doesn't conflict; grep indicates this
> function is usually defined at the SoC-level, not the CPU-level, at least
> for ARM.
> 
> Signed-off-by: Stephen Warren <swar...@wwwdotorg.org>

Acked-by: Marek Vasut <ma...@denx.de>

> ---
>  arch/arm/cpu/arm1176/bcm2835/Makefile |    2 +-
>  arch/arm/cpu/arm1176/bcm2835/init.c   |   24 ++++++++++++++++++++++++
>  arch/arm/cpu/arm1176/cpu.c            |    7 -------
>  3 files changed, 25 insertions(+), 8 deletions(-)
>  create mode 100644 arch/arm/cpu/arm1176/bcm2835/init.c
> 
> diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile
> b/arch/arm/cpu/arm1176/bcm2835/Makefile index 4ea6d6b..95da6a8 100644
> --- a/arch/arm/cpu/arm1176/bcm2835/Makefile
> +++ b/arch/arm/cpu/arm1176/bcm2835/Makefile
> @@ -17,7 +17,7 @@ include $(TOPDIR)/config.mk
>  LIB  = $(obj)lib$(SOC).o
> 
>  SOBJS        := lowlevel_init.o
> -COBJS        := reset.o timer.o
> +COBJS        := init.o reset.o timer.o
> 
>  SRCS := $(SOBJS:.o=.c) $(COBJS:.o=.c)
>  OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
> diff --git a/arch/arm/cpu/arm1176/bcm2835/init.c
> b/arch/arm/cpu/arm1176/bcm2835/init.c new file mode 100644
> index 0000000..e90d3bb
> --- /dev/null
> +++ b/arch/arm/cpu/arm1176/bcm2835/init.c
> @@ -0,0 +1,24 @@
> +/*
> + * (C) Copyright 2012 Stephen Warren
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <common.h>
> +
> +int arch_cpu_init(void)
> +{
> +     icache_enable();
> +
> +     return 0;
> +}
> diff --git a/arch/arm/cpu/arm1176/cpu.c b/arch/arm/cpu/arm1176/cpu.c
> index 532a90b..c0fd114 100644
> --- a/arch/arm/cpu/arm1176/cpu.c
> +++ b/arch/arm/cpu/arm1176/cpu.c
> @@ -65,10 +65,3 @@ static void cache_flush (void)
>       /* mem barrier to sync things */
>       asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
>  }
> -
> -int arch_cpu_init(void)
> -{
> -     icache_enable();
> -
> -     return 0;
> -}

Best regards,
Marek Vasut
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