2012/9/4 Zhizhou Zhang <etou...@gmail.com>:
> Prepare for upcoming mips64 support. This patch add mips64 address
> space support.
>
> Signed-off-by: Zhizhou Zhang <etou...@gmail.com>
> ---
> arch/mips/include/asm/addrspace.h | 2 +-
> arch/mips/include/asm/asm.h | 2 +-
> arch/mips/include/asm/io.h | 16 ++++++++++++++++
> arch/mips/include/asm/posix_types.h | 6 ++++++
> 4 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/include/asm/addrspace.h
> b/arch/mips/include/asm/addrspace.h
> index 3a1e6d6..b768bb5 100644
> --- a/arch/mips/include/asm/addrspace.h
> +++ b/arch/mips/include/asm/addrspace.h
> @@ -136,7 +136,7 @@
> cannot access physical memory directly from core */
> #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
> #else /* !CONFIG_SOC_AU1X00 */
> -#define UNCACHED_SDRAM(a) KSEG1ADDR(a)
> +#define UNCACHED_SDRAM(a) CKSEG1ADDR(a)
> #endif /* CONFIG_SOC_AU1X00 */
> #endif /* __ASSEMBLY__ */
>
> diff --git a/arch/mips/include/asm/asm.h b/arch/mips/include/asm/asm.h
> index 608cfcf..933ccb1 100644
> --- a/arch/mips/include/asm/asm.h
> +++ b/arch/mips/include/asm/asm.h
> @@ -401,7 +401,7 @@ symbol = value
> #ifdef CONFIG_SGI_IP28
> /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
> #include <asm/cacheops.h>
> -#define R10KCBARRIER(addr) cache Cache_Barrier, addr;
> +#define R10KCBARRIER(addr) cache CACHE_BARRIER, addr;
this change is unrelated to this patch. I guess this belongs to patch 1/4
> #else
> #define R10KCBARRIER(addr)
> #endif
> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
> index 025012a..80eab75 100644
> --- a/arch/mips/include/asm/io.h
> +++ b/arch/mips/include/asm/io.h
> @@ -120,12 +120,20 @@ static inline void set_io_port_base(unsigned long base)
> */
> extern inline phys_addr_t virt_to_phys(volatile void * address)
> {
> +#ifndef CONFIG_64BIT
> return CPHYSADDR(address);
> +#else
> + return XPHYSADDR(address);
> +#endif
> }
>
> extern inline void * phys_to_virt(unsigned long address)
> {
> +#ifndef CONFIG_64BIT
> return (void *)KSEG0ADDR(address);
> +#else
> + return (void *)CKSEG0ADDR(address);
> +#endif
> }
>
> /*
> @@ -133,12 +141,20 @@ extern inline void * phys_to_virt(unsigned long address)
> */
> extern inline unsigned long virt_to_bus(volatile void * address)
> {
> +#ifndef CONFIG_64BIT
> return CPHYSADDR(address);
> +#else
> + return XPHYSADDR(address);
> +#endif
> }
>
> extern inline void * bus_to_virt(unsigned long address)
> {
> +#ifndef CONFIG_64BIT
> return (void *)KSEG0ADDR(address);
> +#else
> + return (void *)CKSEG0ADDR(address);
> +#endif
> }
>
> /*
> diff --git a/arch/mips/include/asm/posix_types.h
> b/arch/mips/include/asm/posix_types.h
> index 879aae2..6566ad0 100644
> --- a/arch/mips/include/asm/posix_types.h
> +++ b/arch/mips/include/asm/posix_types.h
> @@ -24,9 +24,15 @@ typedef int __kernel_pid_t;
> typedef int __kernel_ipc_pid_t;
> typedef int __kernel_uid_t;
> typedef int __kernel_gid_t;
> +#ifndef CONFIG_MIPS64
> typedef unsigned int __kernel_size_t;
> typedef int __kernel_ssize_t;
> typedef int __kernel_ptrdiff_t;
> +#else
> +typedef unsigned long __kernel_size_t;
> +typedef long __kernel_ssize_t;
> +typedef long __kernel_ptrdiff_t;
> +#endif
> typedef long __kernel_time_t;
> typedef long __kernel_suseconds_t;
> typedef long __kernel_clock_t;
> --
> 1.7.9.5
>
--
Best regards,
Daniel
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