This patch is fixed the wrong function argument.
And quirks should be set into s5p_sdhci.c.
There are only exynos specific codes.
(this patch is based on u-boot-samsung repository)
Signed-off-by: Jaehoon Chung <jh80.ch...@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.p...@samsung.com>
---
arch/arm/include/asm/arch-exynos/mmc.h | 4 ++--
arch/arm/include/asm/arch-s5pc1xx/mmc.h | 4 ++--
drivers/mmc/s5p_sdhci.c | 11 ++++++-----
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mmc.h
b/arch/arm/include/asm/arch-exynos/mmc.h
index 0f701c9..1ede23c 100644
--- a/arch/arm/include/asm/arch-exynos/mmc.h
+++ b/arch/arm/include/asm/arch-exynos/mmc.h
@@ -64,11 +64,11 @@
#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16)
#define SDHCI_CTRL4_DRIVE_SHIFT (16)
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks);
+int s5p_sdhci_init(u32 regbase, int index, int buswidth);
static inline unsigned int s5p_mmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x10000 * index);
- return s5p_sdhci_init(base, 52000000, 400000, index);
+ return s5p_sdhci_init(base, index, bus_width);
}
#endif
diff --git a/arch/arm/include/asm/arch-s5pc1xx/mmc.h
b/arch/arm/include/asm/arch-s5pc1xx/mmc.h
index 0f701c9..1ede23c 100644
--- a/arch/arm/include/asm/arch-s5pc1xx/mmc.h
+++ b/arch/arm/include/asm/arch-s5pc1xx/mmc.h
@@ -64,11 +64,11 @@
#define SDHCI_CTRL4_DRIVE_MASK(_x) ((_x) << 16)
#define SDHCI_CTRL4_DRIVE_SHIFT (16)
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks);
+int s5p_sdhci_init(u32 regbase, int index, int buswidth);
static inline unsigned int s5p_mmc_init(int index, int bus_width)
{
unsigned int base = samsung_get_base_mmc() + (0x10000 * index);
- return s5p_sdhci_init(base, 52000000, 400000, index);
+ return s5p_sdhci_init(base, index, bus_width);
}
#endif
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index 1d4481b..420cbc8 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -69,7 +69,7 @@ static void s5p_sdhci_set_control_reg(struct sdhci_host *host)
sdhci_writel(host, ctrl, SDHCI_CONTROL2);
}
-int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32 quirks)
+int s5p_sdhci_init(u32 regbase, int index, int buswidth)
{
struct sdhci_host *host = NULL;
host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
@@ -80,11 +80,10 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk,
u32 quirks)
host->name = S5P_NAME;
host->ioaddr = (void *)regbase;
- host->quirks = quirks;
- host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE;
+ host->quirks = SDHCI_QUIRK_NO_HISPD_BIT | SDHCI_QUIRK_BROKEN_VOLTAGE;
host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
- if (quirks & SDHCI_QUIRK_REG32_RW)
+ if (host->quirks & SDHCI_QUIRK_REG32_RW)
host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
else
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
@@ -92,7 +91,9 @@ int s5p_sdhci_init(u32 regbase, u32 max_clk, u32 min_clk, u32
quirks)
host->set_control_reg = &s5p_sdhci_set_control_reg;
host->host_caps = MMC_MODE_HC;
+ if (buswidth == 8)
+ host->host_caps |= MMC_MODE_8BIT;
- add_sdhci(host, max_clk, min_clk);
+ add_sdhci(host, 520000000, 400000);
return 0;
}
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