Hi R Sricharan,
On Thu, 17 May 2012 15:22:54 +0530, R Sricharan <r.sricha...@ti.com>
wrote:
> The following is the cleanup sequence in arch/arm/cpu/armv7/cpu.c
>
> int cleanup_before_linux(void)
> {
> ...
> ...
> dcache_disable();
> v7_outer_cache_disable();
> invalidate_dcache_all();
> }
>
> 1) invalidate_dcache_all call expects that all the caches has been
> flushed, invalidated and there are no dirty entries prior to its
> execution. In the above sequence dcache_disable() flushes,
> invalidates the caches and turns off the mmu. But after it cleanups
> the cache and before the mmu is disabled there is a cp_delay()
> function which has STR instruction. On certain cores like the
> cortex-a15, cache hit and a write can happen to a cache line even
> when the dcache is disabled. So the above mentioned STR instruction
> creates a dirty entry after cleaning. The mmu gets disabled after
> this.
>
> 2) invalidate_dcache_all invalidates the cache lines. Again on
> cores like cortex-a15, invalidate instruction flushes the dirty
> line as well. So some times the dirty line from sequence 1
> can corrupt the memory resulting in a crash.
>
> Fixing this by moving the get_cr() and cp_delay() calls before
> cleaning up the cache, thus avoiding the dirty entry.
>
> Signed-off-by: R Sricharan <r.sricha...@ti.com>
> ---
Applied to u-boot-arm/master, thanks.
Amicalement,
--
Albert.
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