On 7/6/2012 10:46 AM, Marek Vasut wrote:
Dear Troy Kisky,

On 7/5/2012 11:50 PM, Marek Vasut wrote:
Dear Troy Kisky,

On 7/5/2012 12:53 PM, Troy Kisky wrote:
Instead of clearing 2 bits, all the other
bits were set because '|=' was used instead
of '&='.

Signed-off-by: Troy Kisky <[email protected]>
Acked-by: Marek Vasut <[email protected]>
Acked-by: Stefano Babic <[email protected]>

---
V2: add acks
---

    drivers/i2c/mxc_i2c.c |    2 +-
    1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index fc68062..c0c45fd 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -264,7 +264,7 @@ void i2c_imx_stop(void)

        /* Stop I2C transaction */
        temp = readb(&i2c_regs->i2cr);

-       temp |= ~(I2CR_MSTA | I2CR_MTX);
+       temp &= ~(I2CR_MSTA | I2CR_MTX);

        writeb(temp, &i2c_regs->i2cr);
        
        i2c_imx_bus_busy(0);
This series was tested on a sabrelite and a i.mx51 board
Sigh, I should test it on the efikamx board. It has some i2c chip that's
hard to talk to since it's quite sensitive to the behavior of the bus.
But since I'm dead busy now, I'll just trust you. I'm glad you found it,
Troy :)
I'd rather have your verification than trust :-)
Thanks for the reviews.
Hmm, lemme see.

Troy
Best regards,
Marek Vasut

Here's a patch to enable i2c for efikamx....


Troy


>From ab6a68eea5ef3959729b874f3b1e5045d2db3b33 Mon Sep 17 00:00:00 2001
From: Troy Kisky <[email protected]>
Date: Fri, 6 Jul 2012 11:12:30 -0700
Subject: [PATCH 1/1] efikmx: quick hack for testing i2c changes

Signed-off-by: Troy Kisky <[email protected]>
---
 board/efikamx/efikamx.c   |   76 ++++++++++++++++++++++++++++++++++++++++++++-
 include/configs/efikamx.h |   10 ++++++
 2 files changed, 85 insertions(+), 1 deletion(-)

diff --git a/board/efikamx/efikamx.c b/board/efikamx/efikamx.c
index e88b2ed..8cb443d 100644
--- a/board/efikamx/efikamx.c
+++ b/board/efikamx/efikamx.c
@@ -31,6 +31,8 @@
 #include <asm/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/mxc_i2c.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
@@ -683,10 +685,82 @@ int board_early_init_f(void)
        return 0;
 }
 
+#define GPIO_NUMBER(port, bit) (((port - 1) << 5) | (bit & 0x1f))
+/* Use to set PAD control */
+#define PAD_CTL_HYS            (1 << 8)
+#define PAD_CTL_PKE            (1 << 7)
+#define PAD_CTL_PUE            (1 << 6)
+#define PAD_CTL_PUS_100K_DOWN  (0 << 4)
+#define PAD_CTL_PUS_47K_UP     (1 << 4)
+#define PAD_CTL_PUS_100K_UP    (2 << 4)
+#define PAD_CTL_PUS_22K_UP     (3 << 4)
+
+#define PAD_CTL_ODE            (1 << 3)
+#define PAD_CTL_SPEED_LOW      (0 << 1)
+#define PAD_CTL_SPEED_MED      (1 << 1)
+#define PAD_CTL_SPEED_HIGH     (2 << 1)
+#define PAD_CTL_SPEED_MAX      (3 << 1)
+#define PAD_CTL_SRE_FAST        (1 << 0)
+#define PAD_CTL_SRE_SLOW        (0 << 0)
+
+#define NO_MUX_I                0
+#define NO_PAD_I                0
+
+#define I2C_PAD_CTRL   (PAD_CTL_PKE | PAD_CTL_PUE |            \
+       PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_HIGH |              \
+       PAD_CTL_HYS | PAD_CTL_ODE | PAD_CTL_SRE_FAST)
+
+#define MX51_PAD_EIM_D16__GPIO2_0              IOMUX_PAD(0x3f0, 0x5c, 1, 
0x0000, 0, 0)
+#define MX51_PAD_EIM_D16__I2C1_SDA             IOMUX_PAD(0x3f0, 0x5c, 0x14, 
0x09b4, 0, 0)
+
+#define MX51_PAD_EIM_D19__GPIO2_3              IOMUX_PAD(0x3fc, 0x68, 1, 
0x0000, 0, 0)
+#define MX51_PAD_EIM_D19__I2C1_SCL             IOMUX_PAD(0x3fc, 0x68, 0x14, 
0x09b0, 0, 0)
+
+#define MX51_PAD_EIM_D24__GPIO2_8              IOMUX_PAD(0x410, 0x7c, 1, 
0x0000, 0, 0)
+#define MX51_PAD_EIM_D24__I2C2_SDA             IOMUX_PAD(0x410, 0x7c, 0x14, 
0x09bc, 0, 0)
+
+#define MX51_PAD_EIM_D27__GPIO2_9              IOMUX_PAD(0x41c, 0x88, 1, 
0x0000, 0, 0)
+#define MX51_PAD_EIM_D27__I2C2_SCL             IOMUX_PAD(0x41c, 0x88, 0x14, 
0x09b8, 0, 0)
+
+#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
+
+#ifdef CONFIG_I2C_MXC
+/* I2C1, SGTL5000 */
+struct i2c_pads_info i2c_pad_info0 = {
+       .scl = {
+               .i2c_mode = MX51_PAD_EIM_D19__I2C1_SCL | PC,
+               .gpio_mode = MX51_PAD_EIM_D19__GPIO2_3 | PC,
+               .gp = GPIO_NUMBER(2, 3)
+       },
+       .sda = {
+               .i2c_mode = MX51_PAD_EIM_D16__I2C1_SDA | PC,
+               .gpio_mode =MX51_PAD_EIM_D16__GPIO2_0 | PC,
+               .gp = GPIO_NUMBER(2, 0)
+       }
+};
+
+/* I2C2 Camera, MIPI */
+struct i2c_pads_info i2c_pad_info1 = {
+       .scl = {
+               .i2c_mode = MX51_PAD_EIM_D27__I2C2_SCL | PC,
+               .gpio_mode =MX51_PAD_EIM_D27__GPIO2_9 | PC,
+               .gp = GPIO_NUMBER(2, 9)
+       },
+       .sda = {
+               .i2c_mode = MX51_PAD_EIM_D24__I2C2_SDA | PC,
+               .gpio_mode = MX51_PAD_EIM_D24__GPIO2_8 | PC,
+               .gp = GPIO_NUMBER(2, 8)
+       }
+};
+#endif
+
 int board_init(void)
 {
        gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
+#ifdef CONFIG_I2C_MXC
+       setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0);
+       setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
+#endif
        return 0;
 }
 
diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h
index 120055f..4a64b8b 100644
--- a/include/configs/efikamx.h
+++ b/include/configs/efikamx.h
@@ -51,6 +51,7 @@
 /*
  * Bootloader Components Configuration
  */
+#define CONFIG_CMD_I2C
 #define CONFIG_CMD_SPI
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_MMC
@@ -99,6 +100,15 @@
 #define CONFIG_MXC_GPIO
 
 /*
+ * I2C Configs
+ */
+#ifdef CONFIG_CMD_I2C
+#define CONFIG_I2C_MXC          1
+#define CONFIG_SYS_I2C_SPEED            400000
+#define CONFIG_I2C_MULTI_BUS
+#endif
+
+/*
  * SPI Interface
  */
 #ifdef CONFIG_CMD_SPI
-- 
1.7.9.5

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