With the implementation of the fsl_elbc_nand driver that supports
reading the ONFI parameter page, at least one of the NAND chip's started
to have the size being wrongly reported.
This is due to the fact that this chip reports having more than one LUN,
and this was not being taken into account in the current ONFI detection
code.
Signed-off-by: Rafael Beims <rafael.beims@rafael.be...@gmail.com>
---
drivers/mtd/nand/nand_base.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index bfd668f..3dd4dd6 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2573,7 +2573,8 @@ static int nand_flash_detect_onfi(struct
mtd_info *mtd, struct nand_chip *chip,
mtd->writesize = le32_to_cpu(p->byte_per_page);
mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
- chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
mtd->erasesize;
+ chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) *
+ p->lun_count * mtd->erasesize;
*busw = 0;
if (le16_to_cpu(p->features) & 1)
*busw = NAND_BUSWIDTH_16;
--
1.7.0.4
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