Dear Tom Rini,
> If we are built with D-CACHE enabled but have run 'dcache off' and then
> attempt to flush unaligned regions we spam the console with problems
> that aren't true (as the cache was off).
>
> Signed-off-by: Tom Rini <tr...@ti.com>
> ---
> arch/arm/cpu/armv7/cache_v7.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
> index 1b4e808..1c0f5b0 100644
> --- a/arch/arm/cpu/armv7/cache_v7.c
> +++ b/arch/arm/cpu/armv7/cache_v7.c
> @@ -250,6 +250,9 @@ static void v7_inval_tlb(void)
>
> void invalidate_dcache_all(void)
> {
> + if (!dcache_status())
> + return;
Will this get optimized out of the dcache is disabled altogether in uboot
config?
btw this is 20% cooler in 10 seconds flat!
https://plus.google.com/102150693225130002912/posts/9gntjh57dXt
> +
> v7_maint_dcache_all(ARMV7_DCACHE_INVAL_ALL);
>
> v7_outer_cache_inval_all();
[...]
Best regards,
Marek Vasut
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