SH7734 support GMII. This add register infomation and the function
which enable GMII.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu...@renesas.com>
CC: Joe Hershberger <joe.hershber...@ni.com>
---
drivers/net/sh_eth.c | 12 +++++++++++-
drivers/net/sh_eth.h | 1 +
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index c1abe7c..f060d44 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -346,9 +346,10 @@ static int sh_eth_phy_config(struct sh_eth_dev *eth)
struct eth_device *dev = port_info->dev;
struct phy_device *phydev;
+ printf("dev->name %s\n", dev->name);
phydev = phy_connect(
miiphy_get_dev_by_name(dev->name),
- port_info->phy_addr, dev, PHY_INTERFACE_MODE_MII);
+ port_info->phy_addr, dev, CONFIG_SH_ETHER_PHY_MODE);
port_info->phydev = phydev;
phy_config(phydev);
@@ -405,6 +406,9 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(TPAUSER_UNLIMITED, TPAUSER(port));
#endif
+#if defined(CONFIG_CPU_SH7734)
+ outl(CONFIG_SH_ETHER_SH7734_MII, RMII_MII(port));
+#endif
/* Configure phy */
ret = sh_eth_phy_config(eth);
if (ret) {
@@ -434,6 +438,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(0, RTRATE(port));
#endif
}
+#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+ else if (phy->speed == 1000) {
+ printf(SHETHER_NAME ": 1000Base/");
+ outl(GECMR_1000B, GECMR(port));
+ }
+#endif
/* Check if full duplex mode is supported by the phy */
if (phy->duplex) {
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 46d8b81..132ea7a 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -225,6 +225,7 @@ struct sh_eth_dev {
#define GECMR(port) (BASE_IO_ADDR + 0x05b0)
#define MAHR(port) (BASE_IO_ADDR + 0x05C0)
#define MALR(port) (BASE_IO_ADDR + 0x05C8)
+#define RMII_MII(port) (BASE_IO_ADDR + 0x0790)
#endif
--
1.7.10
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