2012/4/21 Marek Vasut <ma...@denx.de>: >> I agree with Vasily Khoruzhick, it looks like a hack > > Please, bother to read the CPU manual and also the ARM Architecture reference > manual before you start with such a wild accusations.
Let me explain my point of view. Doing SDRAM init very early (even in assembly code) is obvious and simple. Just few simple writes into RAM controller registers. But to use cache as RAM you need to program and enable MMU (again assembly, right?). And then one needs to program SDRAM controller (ok, this part is in C code, but I don't see any advantage). It's not as simple as previous solution, isn't it? And looks overengineered to me. I prefer to keep such low-level things simple. Regards Vasily _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
