Hi Stephen,
On Mon, Apr 9, 2012 at 2:09 PM, Stephen Warren <swar...@wwwdotorg.org> wrote:
> On 04/02/2012 05:18 PM, Simon Glass wrote:
>> We want to know which type of chip we are running on - the Tegra
>> family has several SKUs. This can be determined by reading a
>> fuse register, so add this function to ap20.
>>
>> Signed-off-by: Simon Glass <s...@chromium.org>
>> Acked-by: Stephen Warren <swar...@nvidia.com>
>> ---
>> Changes in v2:
>> - Add check of undocumented values in hidrev register
>
>> diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c
>> b/arch/arm/cpu/armv7/tegra2/ap20.c
>
>> +int tegra_get_chip_type(void)
>> +{
>> + struct apb_misc_gp_ctlr *gp;
>> + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE;
>> + uint tegra_sku_id, rev;
>> +
>> + /*
>> + * This is undocumented, Chip ID is bits 15:8 of the register
>> + * APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for
>> + * Tegra30
>> + */
>> + gp = (struct apb_misc_gp_ctlr *)TEGRA2_APB_MISC_GP_BASE;
>> + rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
>
> That's not entirely true; the register and its fields are documented in
> the TRM. The values of the CHIPID field itself are indeed not documented.
OK I have updated this. It is confusing because there is another
register at TEGRA2_APB_MISC_PP_BASE which has a space in those fields.
Regards,
Simon
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