Hi Puneet, On Mon, Mar 5, 2012 at 6:46 AM, Puneet Saxena <pune...@nvidia.com> wrote: > As DMA expects the buffers to be equal and larger then > cache lines, This aligns buffers at cacheline. > > Signed-off-by: Puneet Saxena <pune...@nvidia.com>
Tested on Seaboard: Tested-by: Simon Glass <s...@chromium.org> Acked-by: Simon Glass <s...@chromium.org> I do still see a few alignment warnings, but only a tidy fraction of what we had. Do you see these? Tegra2 (SeaBoard) # usb start (Re)start USB... USB: Register 10011 NbrPorts 1 USB EHCI 1.00 scanning bus for devices... ERROR: v7_dcache_inval_range - start address is not aligned - 0x3fbed6f2 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x3fbed732 ERROR: v7_dcache_inval_range - start address is not aligned - 0x3fbed484 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x3fbed584 ERROR: v7_dcache_inval_range - start address is not aligned - 0x3fbed492 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x3fbed592 ERROR: v7_dcache_inval_range - start address is not aligned - 0x3fbed49e ERROR: v7_dcache_inval_range - stop address is not aligned - 0x3fbed59e ERROR: v7_dcache_inval_range - start address is not aligned - 0x3fbed4a2 ERROR: v7_dcache_inval_range - stop address is not aligned - 0x3fbed582 2 USB Device(s) found scanning bus for storage devices... 1 Storage Device(s) found Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot