The different silicon revision variable names was defined for OMAP4 and
OMAP5 socs. Making the variable common so that some code can be
made generic.

Signed-off-by: R Sricharan <r.sricha...@ti.com>
---
 arch/arm/cpu/armv7/omap4/hwinit.c           |   20 ++++++++++----------
 arch/arm/cpu/armv7/omap5/hwinit.c           |    6 +++---
 arch/arm/include/asm/arch-omap4/sys_proto.h |    6 ------
 arch/arm/include/asm/arch-omap5/sys_proto.h |    6 ------
 arch/arm/include/asm/omap_common.h          |    6 ++++++
 5 files changed, 19 insertions(+), 25 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c 
b/arch/arm/cpu/armv7/omap4/hwinit.c
index 91f8320..afa5484 100644
--- a/arch/arm/cpu/armv7/omap4/hwinit.c
+++ b/arch/arm/cpu/armv7/omap4/hwinit.c
@@ -37,7 +37,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-u32 *const omap4_revision = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
+u32 *const omap_si_rev = (u32 *)OMAP4_SRAM_SCRATCH_OMAP4_REV;
 
 static const struct gpio_bank gpio_bank_44xx[6] = {
        { (void *)OMAP44XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -129,40 +129,40 @@ void init_omap_revision(void)
 
        switch (arm_rev) {
        case MIDR_CORTEX_A9_R0P1:
-               *omap4_revision = OMAP4430_ES1_0;
+               *omap_si_rev = OMAP4430_ES1_0;
                break;
        case MIDR_CORTEX_A9_R1P2:
                switch (readl(CONTROL_ID_CODE)) {
                case OMAP4_CONTROL_ID_CODE_ES2_0:
-                       *omap4_revision = OMAP4430_ES2_0;
+                       *omap_si_rev = OMAP4430_ES2_0;
                        break;
                case OMAP4_CONTROL_ID_CODE_ES2_1:
-                       *omap4_revision = OMAP4430_ES2_1;
+                       *omap_si_rev = OMAP4430_ES2_1;
                        break;
                case OMAP4_CONTROL_ID_CODE_ES2_2:
-                       *omap4_revision = OMAP4430_ES2_2;
+                       *omap_si_rev = OMAP4430_ES2_2;
                        break;
                default:
-                       *omap4_revision = OMAP4430_ES2_0;
+                       *omap_si_rev = OMAP4430_ES2_0;
                        break;
                }
                break;
        case MIDR_CORTEX_A9_R1P3:
-               *omap4_revision = OMAP4430_ES2_3;
+               *omap_si_rev = OMAP4430_ES2_3;
                break;
        case MIDR_CORTEX_A9_R2P10:
                switch (readl(CONTROL_ID_CODE)) {
                case OMAP4460_CONTROL_ID_CODE_ES1_1:
-                       *omap4_revision = OMAP4460_ES1_1;
+                       *omap_si_rev = OMAP4460_ES1_1;
                        break;
                case OMAP4460_CONTROL_ID_CODE_ES1_0:
                default:
-                       *omap4_revision = OMAP4460_ES1_0;
+                       *omap_si_rev = OMAP4460_ES1_0;
                        break;
                }
                break;
        default:
-               *omap4_revision = OMAP4430_SILICON_ID_INVALID;
+               *omap_si_rev = OMAP4430_SILICON_ID_INVALID;
                break;
        }
 }
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c 
b/arch/arm/cpu/armv7/omap5/hwinit.c
index 68cf558..84b3830 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -38,7 +38,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-u32 *const omap5_revision = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
+u32 *const omap_si_rev = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
 
 static struct gpio_bank gpio_bank_54xx[6] = {
        { (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -154,9 +154,9 @@ void init_omap_revision(void)
 
        switch (rev) {
        case MIDR_CORTEX_A15_R0P0:
-               *omap5_revision = OMAP5430_ES1_0;
+               *omap_si_rev = OMAP5430_ES1_0;
                break;
        default:
-               *omap5_revision = OMAP5430_SILICON_ID_INVALID;
+               *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
        }
 }
diff --git a/arch/arm/include/asm/arch-omap4/sys_proto.h 
b/arch/arm/include/asm/arch-omap4/sys_proto.h
index b8dbc2c..4037172 100644
--- a/arch/arm/include/asm/arch-omap4/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap4/sys_proto.h
@@ -112,10 +112,4 @@ static inline u32 omap_hw_init_context(void)
 #endif
 }
 
-static inline u32 omap_revision(void)
-{
-       extern u32 *const omap4_revision;
-       return *omap4_revision;
-}
-
 #endif
diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h 
b/arch/arm/include/asm/arch-omap5/sys_proto.h
index 40a7c57..0d344d6 100644
--- a/arch/arm/include/asm/arch-omap5/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h
@@ -113,10 +113,4 @@ static inline u32 omap_hw_init_context(void)
 #endif
 }
 
-static inline u32 omap_revision(void)
-{
-       extern u32 *const omap5_revision;
-       return *omap5_revision;
-}
-
 #endif
diff --git a/arch/arm/include/asm/omap_common.h 
b/arch/arm/include/asm/omap_common.h
index 34bec45..03b7ff1 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -103,6 +103,12 @@ void spl_mmc_load_image(void);
 void spl_board_init(void);
 #endif
 
+static inline u32 omap_revision(void)
+{
+       extern u32 *const omap_si_rev;
+       return *omap_si_rev;
+}
+
 /*
  * silicon revisions.
  * Moving this to common, so that most of code can be moved to common,
-- 
1.7.1

_______________________________________________
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Reply via email to