On 02/29/2012 06:12 AM, Orjan Friberg wrote: > For the beagleboard, ecc.size is not explicitly set when doing 'nandecc > sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's > set to 256 bytes. > > When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when > changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly > the format has changed. > > > It seems the current nandecc command needs to set this explicitly, but > also needs to be augmented to be able to select the newly added 4/8-bit > BCH ECC.
Yes, that looks like a bug in omap_nand_switch_ecc(). > But it also seems like nandecc selection should be more generic than for > omap3 (currently it lives in arch/arm/cpu/armv7/omap3/board.c). ECC mode is normally not something that you want to be runtime switchable, as changing it usually changes the on-flash format. It also requires driver cooperation -- the actual implementation (as opposed to the command-line wrapper) is in drivers/mtd/nand/omap_gpmc.c. If we end up with multiple drivers that need to expose this sort of functionality, maybe we can consider moving the command line wrapper to common code. -Scott _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
