Sorry, you will find now my fixes in attachment Hi all,
I had some problem when using your e1000-code on a MIPS target. Attached you will find two fixes which I would like to propose for discussion. - Fix 1: this has the same reason as in commit f81ecb5d3300bf92d17302d3712f30585c182da9 - Fix 2: has to do with "C Language Operator Precedence". I would say the expression taken by the ! operator has precedence before the & operator. So any bit in rd->status other than E1000_RXD_STAT_DD stops correct detection of data reception. (What i do not know is, if it is possible that any other bit than E1000_RXD_STAT_DD can get active) Please leave me in CC, because i'm not subscribed to this list. Thanks a lot for providing u-boot. Best regards Ralf -- Roesch & Walter___________________________________________ Industrie-Elektronik GmbH * Tel.: +49-7824 / 6628-0 Wörtelweg 2b/c * Fax: +49-7824 / 6628-29 D-77963 Schwanau * mailto:ralf.roe...@rw-gmbh.de Germany * WWW: http://www.rw-gmbh.de Amtsgericht Freiburg i.Br. HRB 391345 Geschäftsführer: Dipl.Ing.(FH) Ralf Rösch, Dipl.Ing.(FH) Martin Walter GnuPG key: 52ECD70F 2010-09-04 [expires: 2012-12-31] Fingerprint: 8415 9113 5F05 D579 6685 D5AD 5CE7 5429 52EC D70F
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index e726f39..293ff1d 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -4837,7 +4837,7 @@ fill_rx(struct e1000_hw *hw) rd = rx_base + rx_tail; rx_tail = (rx_tail + 1) % 8; memset(rd, 0, 16); - rd->buffer_addr = cpu_to_le64((u32) & packet); + rd->buffer_addr = cpu_to_le64(virt_to_bus(hw->pdev, packet)); E1000_WRITE_REG(hw, RDT, rx_tail); } @@ -5020,7 +5020,7 @@ e1000_poll(struct eth_device *nic) struct e1000_rx_desc *rd; /* return true if there's an ethernet packet ready to read */ rd = rx_base + rx_last; - if (!(le32_to_cpu(rd->status)) & E1000_RXD_STAT_DD) + if (!(le32_to_cpu(rd->status) & E1000_RXD_STAT_DD)) return 0; /*DEBUGOUT("recv: packet len=%d \n", rd->length); */ NetReceive((uchar *)packet, le32_to_cpu(rd->length));
_______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot