The way the SPL code is setup right now it only works in the
CONFIG_NAND_SPL case. The chip I'm working on, the lpc313x, can SPL
from six different sources. I've implemented the secondary loader code
in board_init_r in cpu/arm926ejs/lpc313x/spl.c. I needed to modify
start.S so that the jump to board_init_r works correctly in the SPL
case.
Is it possible to merge things further and get rid of this special case?
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
ldr r1, _TEXT_BASE
add lr, r0, r1
add lr, lr, r9
---------------------------------------------------------------------------
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 5e30745..0f97979 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -64,6 +64,13 @@ _start:
b reset
#endif
#ifdef CONFIG_SPL_BUILD
+#ifdef CONFIG_LPC313x_BOOT_HEADER
+ .word 0x41676d69 /* image magic number, imgA */
+ .word 0,0,0,0,0
+ .word 0x0000000A /*Plain text no CRC check*/
+ .word (__initial_boot_image_size) /* image length */
+ .word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+#else
/* No exception handlers in preloader */
ldr pc, _hang
ldr pc, _hang
@@ -83,6 +90,7 @@ _hang:
.word 0x12345678
.word 0x12345678
.word 0x12345678
+#endif
#else
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
@@ -126,7 +134,11 @@ _fiq:
.globl _TEXT_BASE
_TEXT_BASE:
+#ifdef CONFIG_SPL_BUILD
+ .word CONFIG_SPL_TEXT_BASE
+#else
.word CONFIG_SYS_TEXT_BASE
+#endif
/*
* These are defined in the board-specific linker script.
@@ -210,6 +222,7 @@ relocate_code:
stack_setup:
mov sp, r4
+ mov r9, #0x00000000 /* relocation offset starts at zero */
adr r0, _start
cmp r0, r6
beq clear_bss /* skip relocation */
--
Jon Smirl
jonsm...@gmail.com
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