On Nov 3, 2011, at 2:18 AM, <chang-ming.hu...@freescale.com> <chang-ming.hu...@freescale.com> wrote:
> From: Jerry Huang <chang-ming.hu...@freescale.com> > > For ICS307-02, there is one general expression to generate SYSCLK: > CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD) > > If we want the required frequency for SYSCLK, we must find one solution > to generate this frequency, this solution includes VDW, RDW and OD. > For OD, there are only eight option value: 10, 2, 8, 4, 5, 7, 3, 6. > For RDW, the range is 1 to 127. > For VDW, the range is 4 to 511. > > First, we use one OD, RDW and required SYSCLK to calculate the VDW, > if VDW is in it's range, we will calculate the CLK1Frequency with > the OD, RDW and VDW calculated, and we will check this percent > (CLK1Frequency / required SYSCLK), and the precision is 1/1000. > if the percent is less than 1/1000, we think the CLK1Frequency is we want. > Otherwise, We will continue to calculate it with the next OD and RDW. > > Signed-off-by: Jerry Huang <chang-ming.hu...@freescale.com> > CC: Kumar Gala <kumar.g...@freescale.com> > --- > changes for v2: > - move these macro to .c file > - change the subject to powerpc/mpc85xx > - add CC > > board/freescale/common/ics307_clk.c | 69 +++++++++++++++++++++++++++++++++++ > board/freescale/common/ics307_clk.h | 4 ++- > board/freescale/common/ngpixis.c | 27 ++++++++++++++ > 3 files changed, 99 insertions(+), 1 deletions(-) applied to 85xx - k _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
