This enables Vpp and disables the flash protection on the
Integrator when starting U-Boot. The integrator/AP has double
protection mechanisms: this one and the EBI protection bit
(patch earlier), the Integrator/CP has only one line of
protection in these registers.
Signed-off-by: Linus Walleij <linus.wall...@linaro.org>
---
ChangeLog v1->v2:
- Rebased to U-Boot ARM HEAD at Alberts request, see message
4ea1c8e7.7090...@aribaud.net
ChangeLog v2->v3:
- Rebased to U-Boot ARM HEAD at Alberts request, see message
4eb84700.1030...@aribaud.net
---
board/armltd/integrator/integrator.c | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/board/armltd/integrator/integrator.c
b/board/armltd/integrator/integrator.c
index dd83ca5..a507c09 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -37,6 +37,7 @@
#include <netdev.h>
#include <asm/io.h>
#include "arm-ebi.h"
+#include "integrator-sc.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -76,7 +77,19 @@ extern void cm_remap(void);
cm_remap(); /* remaps writeable memory to 0x00000000 */
#endif
+#ifdef CONFIG_ARCH_CINTEGRATOR
/*
+ * Flash protection on the Integrator/CP is in a simple register
+ */
+ val = readl(CP_FLASHPROG);
+ val |= (CP_FLASHPROG_FLVPPEN | CP_FLASHPROG_FLWREN);
+ writel(val, CP_FLASHPROG);
+#else
+ /*
+ * The Integrator/AP has some special protection mechanisms
+ * for the external memories, first the External Bus Interface (EBI)
+ * then the system controller (SC).
+ *
* The system comes up with the flash memory non-writable and
* configuration locked. If we want U-Boot to be used for flash
* access we cannot have the flash memory locked.
@@ -88,6 +101,13 @@ extern void cm_remap(void);
writel(val, EBI_BASE + EBI_CSR1_REG);
writel(0, EBI_BASE + EBI_LOCK_REG);
+ /*
+ * Set up the system controller to remove write protection from
+ * the flash memory and enable Vpp
+ */
+ writel(SC_CTRL_FLASHVPP | SC_CTRL_FLASHWP, SC_CTRLS);
+#endif
+
icache_enable ();
return 0;
--
1.7.6.4
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