On 09/26/2011 11:02 AM, Laurence Withers wrote:
> In nand_davinci_readecc(), select the correct NANDF<n>ECC register based
> on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC.
> This allows 1-bit hardware ECC to work with chip select other than CS2.
> 
> Note this now matches the usage in nand_davinci_enable_hwecc(), which
> already had the correct handling, and allows refactoring to a single
> function encapsulating the register read.
> 
> Without this fix, writing NAND pages to a chip not wired to CS2 would
> result in in the ECC calculation always returning FFFFFF for each
> 512-byte segment, and reading back a correctly written page (one with
> ECC intact) would always fail. With this fix, the ECC is written and
> verified correctly.
> 
> Signed-off-by: Laurence Withers <lwith...@guralp.com>
> ---
> Changes for v2:
>   Add Signed-off-by to commit message.
> ---
>  drivers/mtd/nand/davinci_nand.c |   26 +++++++++++++-------------
>  1 files changed, 13 insertions(+), 13 deletions(-)

Applied to u-boot-nand-flash

-Scott

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