On Sep 16, 2011, at 3:21 PM, York Sun wrote: > Interactive DDR debugging provides a user interface to view and modify SPD, > DIMM parameters, board options and DDR controller registers before DDR is > initialized. With this feature, developers can fine-tune DDR for board > bringup and other debugging without frequently having to reprogram the flash. > > To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header > file and set an environment variable to activate it. Syntax: > > setenv ddr_interactive on > > After reset, U-boot prompts before initializing DDR controllers > FSL DDR> > > The available commands are > print print SPD and intermediate computed data > reset reboot machine > recompute reload SPD and options to default and recompute regs > edit modify spd, parameter, or option > compute recompute registers from current next_step to end > next_step shows current next_step > help this message > go program the memory controller and continue with u-boot > > The first command should be "compute", which reads data from DIMM SPDs and > board options, performs the calculation then stops before setting DDR > controller. A user can use "print" and "edit" commands to view and modify > anything. "Go" picks up from current step with any modification and > compltes the calculation then enables the DDR controller to continue u-boot. > "Recompute" does it over from fresh reading. > > Signed-off-by: York Sun <york...@freescale.com> > --- > Change since v3 > Add detail syntax and examples in README.fsl-doc > > README | 3 + > arch/powerpc/cpu/mpc8xxx/ddr/Makefile | 3 +- > arch/powerpc/cpu/mpc8xxx/ddr/ddr.h | 40 +- > arch/powerpc/cpu/mpc8xxx/ddr/interactive.c | 1691 ++++++++++++++++++++++++++++ > arch/powerpc/cpu/mpc8xxx/ddr/main.c | 9 +- > doc/README.fsl-ddr | 150 +++ > 6 files changed, 1879 insertions(+), 17 deletions(-) > create mode 100644 arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
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