On Sep 13, 2011, at 2:15 AM, Zhao Chenhui wrote:

> From: chenhui zhao <chenhui.z...@freescale.com>
> 
> Erratum NMG_DDR120 (DDR19 in MPC8548 errata document) applies to some
> early version silicons. The default settings of the DDR IO receiver
> biasing may not work at cold temperature. When a failure occurs,
> a DDR input latches an incorrect value. The workaround will set the
> receiver to an acceptable bias point.
> 
> Signed-off-by: Gong Chen <g.c...@freescale.com>
> Signed-off-by: Zhao Chenhui <chenhui.z...@freescale.com>
> ---
> arch/powerpc/cpu/mpc85xx/cmd_errata.c     |    4 ++++
> arch/powerpc/cpu/mpc85xx/ddr-gen2.c       |   22 +++++++++++++++++++++-
> arch/powerpc/include/asm/config_mpc85xx.h |    1 +
> 3 files changed, 26 insertions(+), 1 deletions(-)

applied to 85xx

- k
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