From: Nagabhushana Netagunte <nagabhushana.netagu...@ti.com> revert commit 913a39e9aa4d935948d41cd727d53f5878414a77 as cache disabling is no more needed. Subsequent patches to new cache management framework has fixed EMAC issue with cache coherency.
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagu...@ti.com> --- include/configs/davinci_dvevm.h | 3 --- 1 files changed, 0 insertions(+), 3 deletions(-) diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h index d13ccb5..50e9e3e 100644 --- a/include/configs/davinci_dvevm.h +++ b/include/configs/davinci_dvevm.h @@ -59,9 +59,6 @@ #define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM644X -#define CONFIG_SYS_ICACHE_OFF -#define CONFIG_SYS_DCACHE_OFF -#define CONFIG_SYS_L2CACHE_OFF /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ -- 1.6.2.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
