Dear Kumar Gala, In message <1314443032-2811-1-git-send-email-ga...@kernel.crashing.org> you wrote: > Issue: > CoreNet bad data signal is not sent with shared data from L1 Data Cache > when it has an error > > Workaround: > Run in write-shadow mode by setting L1CSR2[DCWS] = 1 > > By default we do NOT enable this, thus we have #undef in > config_mpc85xx.h for this erratum.
NAK. Please do not undef what is not defined anyway. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de COBOL is for morons. -- E.W. Dijkstra _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
