----- "Prafulla Wadaskar" <prafu...@marvell.com> wrote:
>
> I suggest below code for this function.
> {
> Const unsigned int offset[4] = {0, 4, 8, 0x100}; /* gpio register
> bank offsets */
> return (struct gpio_reg *)(ARMD1_GPIO_BASE + offset[bank]);
> }
>
> Again content in this file are SoC core specific and will duplicate
> for other SoC supports like pantheon.
>
> Can you please move them to mvgpio.h within #ifdef
> CONFIG_SHEEVA_88SV331xV5?
> I think this should be the final modification for this driver
> support.
>
> Sorry for the rework.
>
> Regards..
> Prafulla . .
>
Hi Prafulla,
Can you please tell me what part of code should be moved to mvgpio.h?
I have no idea about number of banks in other SOCs with same core.
I will do the changes as per suggestion.
Thanks & Regards,
Ajay Bhargav
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