Add support for TLMM pin controller block (Top Level Mode Multiplexer) on MSM8953 SoC.
Signed-off-by: Luca Weiss <[email protected]> --- drivers/pinctrl/qcom/Kconfig | 8 ++++ drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-msm8953.c | 80 ++++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+) diff --git a/drivers/pinctrl/qcom/Kconfig b/drivers/pinctrl/qcom/Kconfig index 0bea461fcc3..21e735a2b99 100644 --- a/drivers/pinctrl/qcom/Kconfig +++ b/drivers/pinctrl/qcom/Kconfig @@ -62,6 +62,14 @@ config PINCTRL_QCOM_MILOS Say Y here to enable support for pinctrl on the Snapdragon Milos SoC, as well as the associated GPIO driver. +config PINCTRL_QCOM_MSM8953 + bool "Qualcomm MSM8953 Pinctrl" + default y if PINCTRL_QCOM_GENERIC + select PINCTRL_QCOM + help + Say Y here to enable support for pinctrl on the MSM8953 SoC, + as well as the associated GPIO driver. + config PINCTRL_QCOM_QCM2290 bool "Qualcomm QCM2290 Pinctrl" default y if PINCTRL_QCOM_GENERIC diff --git a/drivers/pinctrl/qcom/Makefile b/drivers/pinctrl/qcom/Makefile index 87cb128c4d4..064c75207cf 100644 --- a/drivers/pinctrl/qcom/Makefile +++ b/drivers/pinctrl/qcom/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_PINCTRL_QCOM_IPQ5424) += pinctrl-ipq5424.o obj-$(CONFIG_PINCTRL_QCOM_IPQ9574) += pinctrl-ipq9574.o obj-$(CONFIG_PINCTRL_QCOM_APQ8096) += pinctrl-apq8096.o obj-$(CONFIG_PINCTRL_QCOM_MILOS) += pinctrl-milos.o +obj-$(CONFIG_PINCTRL_QCOM_MSM8953) += pinctrl-msm8953.o obj-$(CONFIG_PINCTRL_QCOM_QCM2290) += pinctrl-qcm2290.o obj-$(CONFIG_PINCTRL_QCOM_QCS404) += pinctrl-qcs404.o obj-$(CONFIG_PINCTRL_QCOM_QCS615) += pinctrl-qcs615.o diff --git a/drivers/pinctrl/qcom/pinctrl-msm8953.c b/drivers/pinctrl/qcom/pinctrl-msm8953.c new file mode 100644 index 00000000000..0c51461183c --- /dev/null +++ b/drivers/pinctrl/qcom/pinctrl-msm8953.c @@ -0,0 +1,80 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Qualcomm MSM8953 pinctrl + * + * (C) Copyright 2026 Luca Weiss <[email protected]> + * + */ + +#include <dm.h> + +#include "pinctrl-qcom.h" + +#define MAX_PIN_NAME_LEN 32 +static char pin_name[MAX_PIN_NAME_LEN] __section(".data"); +static const char * const msm_pinctrl_pins[] = { + "qdsd_clk", + "qdsd_cmd", + "qdsd_data0", + "qdsd_data1", + "qdsd_data2", + "qdsd_data3", + "sdc1_clk", + "sdc1_cmd", + "sdc1_data", + "sdc1_rclk", + "sdc2_clk", + "sdc2_cmd", + "sdc2_data", +}; + +static const struct pinctrl_function msm_pinctrl_functions[] = { + {"blsp_uart2", 2}, +}; + +static const char *msm8953_get_function_name(struct udevice *dev, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].name; +} + +static const char *msm8953_get_pin_name(struct udevice *dev, + unsigned int selector) +{ + if (selector < 142) { + snprintf(pin_name, MAX_PIN_NAME_LEN, "gpio%u", selector); + return pin_name; + } else { + return msm_pinctrl_pins[selector - 142]; + } +} + +static int msm8953_get_function_mux(__maybe_unused unsigned int pin, + unsigned int selector) +{ + return msm_pinctrl_functions[selector].val; +} + +static const struct msm_pinctrl_data msm8953_data = { + .pin_data = { + .pin_count = 155, + .special_pins_start = 142, + }, + .functions_count = ARRAY_SIZE(msm_pinctrl_functions), + .get_function_name = msm8953_get_function_name, + .get_function_mux = msm8953_get_function_mux, + .get_pin_name = msm8953_get_pin_name, +}; + +static const struct udevice_id msm_pinctrl_ids[] = { + { .compatible = "qcom,msm8953-pinctrl", .data = (ulong)&msm8953_data }, + { /* Sentinel */ } +}; + +U_BOOT_DRIVER(pinctrl_msm8953) = { + .name = "pinctrl_msm8953", + .id = UCLASS_NOP, + .of_match = msm_pinctrl_ids, + .ops = &msm_pinctrl_ops, + .bind = msm_pinctrl_bind, +}; -- 2.55.0
