On Wed, Jul 08, 2026 at 07:55:54AM +0000, Desapogu, Jayaramudu wrote: > AMD General > > Hi , > > Gentle ping for this patch. > > Could someone please take a look when time permits? > > Thanks, > Jayaram > > -----Original Message----- > From: Desapogu, Jayaramudu <[email protected]> > Sent: Wednesday, June 3, 2026 7:00 PM > To: [email protected] > Cc: [email protected]; Desapogu, Jayaramudu <[email protected]> > Subject: [PATCH] video: fix no display when serial console is disabled > > When the serial console is disabled in coreboot configuration, no display > output is observed during boot. > > This happens because DBG2 (Debug Port 2 table) configuration is required for > proper UART initialization and affects the video initialization path. > > Fix this by ensuring DBG2 is correctly configured as a 16550-compatible UART, > allowing video initialization to proceed independently of serial console > settings. > > Signed-off-by: Desapogu Jayaramudu <[email protected]> > --- > include/acpi/acpi_table.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h index > 4895366a618..3517698ff3e 100644 > --- a/include/acpi/acpi_table.h > +++ b/include/acpi/acpi_table.h > @@ -667,7 +667,7 @@ struct __packed acpi_dmar { > > /* Subtypes for port_subtype field */ > > -#define ACPI_DBG2_16550_COMPATIBLE 0x0000 > +#define ACPI_DBG2_16550_COMPATIBLE 0x0012 > #define ACPI_DBG2_16550_SUBSET 0x0001 > #define ACPI_DBG2_ARM_PL011 0x0003 > #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
As presumably these values are defined by some specification, a link to the source would make it easy to verify this is correct (and in turn, be a good chance to verify the other values). Thanks. -- Tom
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