From: Nagabhushana Netagunte <nagabhushana.netagu...@ti.com> Print DDR frequency when u-boot is coming up. Function is added in hardware.h to find which PLL clock used.
Signed-off-by: Rajashekhara, Sudhakar <sudhakar....@ti.com> Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagu...@ti.com> --- arch/arm/include/asm/arch-davinci/hardware.h | 12 ++++++++++++ board/davinci/da8xxevm/da850evm.c | 1 + 2 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 3d6cb88..514b359 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -380,8 +380,14 @@ struct davinci_pllc_regs { #define DAVINCI_PLLC_DIV_MASK 0x1f #define ASYNC3 get_async3_src() +#define EMIFB get_emifb_src() + +#define PLL1_PLLM ((1 << 16) | DAVINCI_PLLM_CLKID) +#define PLL1_SYSCLK1 ((1 << 16) | 0x1) #define PLL1_SYSCLK2 ((1 << 16) | 0x2) #define DAVINCI_SPI1_CLKID (cpu_is_da830() ? 2 : ASYNC3) +#define DAVINCI_DDR_CLKID EMIFB + /* Clock IDs */ enum davinci_clk_ids { DAVINCI_SPI0_CLKID = 2, @@ -485,6 +491,12 @@ static inline int get_async3_src(void) PLL1_SYSCLK2 : 2; } +static inline int get_emifb_src(void) +{ + return (REG(&davinci_syscfg_regs->cfgchip3) & 0x80) ? + PLL1_PLLM : PLL1_SYSCLK1; +} + #endif /* CONFIG_SOC_DA8XX */ #endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index a077368..55c5a22 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -502,6 +502,7 @@ int misc_init_r(void) int ret; printf("ARM Clock : %d Hz\n", clk_get(DAVINCI_ARM_CLKID)); + printf("DDR Clock : %d Hz\n", clk_get(DAVINCI_DDR_CLKID)/2); if (getenv("ethaddr") == NULL) { /* Read Ethernet MAC address from EEPROM */ -- 1.6.2.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot