On Tue, 13 Jan 2026 12:28:55 +0530, Balaji Selvanathan wrote:
> Correct USB30 primary clock RCG configuration and add missing
> USB3_PRIM_PHY_AUX_CMD_RCGR RCG configuration.
> Above taken from Linux commit 08c51ceb12f7 ("clk: qcom: add the GCC driver
> for sa8775p")
>
> Add missing USB3_PRIM_PHY_PIPE_CLK gate clock definition.
> Extend reset map with USB-related BCR entries and video BCR
> for comprehensive reset control support.
>
> [...]
Applied, thanks!
[1/1] clk: qcom: sa8775p: Fix USB clock configuration and add resets
https://source.denx.de/u-boot/custodians/u-boot-snapdragon/-/commit/f4886799a0af
Best regards,
--
// Casey (she/they)
