Ported from the Mediatek SDK. The upstream Linux kernel also has the same register map as the SDK.
Signed-off-by: Shiji Yang <[email protected]> --- drivers/pinctrl/mediatek/pinctrl-mt7981.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/mediatek/pinctrl-mt7981.c index 6b9769067b0..13c3dc143cb 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c @@ -103,8 +103,8 @@ static const struct mtk_pin_field_calc mt7981_pin_ies_range[] = { PIN_FIELD_BASE(6, 6, 4, 0x20, 0x10, 3, 1), PIN_FIELD_BASE(7, 7, 4, 0x20, 0x10, 0, 1), PIN_FIELD_BASE(8, 8, 4, 0x20, 0x10, 4, 1), - PIN_FIELD_BASE(9, 9, 4, 0x20, 0x10, 9, 1), + PIN_FIELD_BASE(9, 9, 5, 0x20, 0x10, 9, 1), PIN_FIELD_BASE(10, 10, 5, 0x20, 0x10, 8, 1), PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1), PIN_FIELD_BASE(12, 12, 5, 0x20, 0x10, 7, 1), @@ -172,8 +172,8 @@ static const struct mtk_pin_field_calc mt7981_pin_smt_range[] = { PIN_FIELD_BASE(6, 6, 4, 0x80, 0x10, 3, 1), PIN_FIELD_BASE(7, 7, 4, 0x80, 0x10, 0, 1), PIN_FIELD_BASE(8, 8, 4, 0x80, 0x10, 4, 1), - PIN_FIELD_BASE(9, 9, 4, 0x80, 0x10, 9, 1), + PIN_FIELD_BASE(9, 9, 5, 0x90, 0x10, 9, 1), PIN_FIELD_BASE(10, 10, 5, 0x90, 0x10, 8, 1), PIN_FIELD_BASE(11, 11, 5, 0x90, 0x10, 10, 1), PIN_FIELD_BASE(12, 12, 5, 0x90, 0x10, 7, 1), @@ -285,8 +285,8 @@ static const struct mtk_pin_field_calc mt7981_pin_drv_range[] = { PIN_FIELD_BASE(6, 6, 4, 0x00, 0x10, 9, 3), PIN_FIELD_BASE(7, 7, 4, 0x00, 0x10, 0, 3), PIN_FIELD_BASE(8, 8, 4, 0x00, 0x10, 12, 3), - PIN_FIELD_BASE(9, 9, 4, 0x00, 0x10, 27, 3), + PIN_FIELD_BASE(9, 9, 5, 0x00, 0x10, 27, 3), PIN_FIELD_BASE(10, 10, 5, 0x00, 0x10, 24, 3), PIN_FIELD_BASE(11, 11, 5, 0x00, 0x10, 0, 3), PIN_FIELD_BASE(12, 12, 5, 0x00, 0x10, 21, 3), @@ -354,8 +354,8 @@ static const struct mtk_pin_field_calc mt7981_pin_pupd_range[] = { PIN_FIELD_BASE(6, 6, 4, 0x30, 0x10, 3, 1), PIN_FIELD_BASE(7, 7, 4, 0x30, 0x10, 0, 1), PIN_FIELD_BASE(8, 8, 4, 0x30, 0x10, 4, 1), - PIN_FIELD_BASE(9, 9, 4, 0x30, 0x10, 9, 1), + PIN_FIELD_BASE(9, 9, 5, 0x30, 0x10, 9, 1), PIN_FIELD_BASE(10, 10, 5, 0x30, 0x10, 8, 1), PIN_FIELD_BASE(11, 11, 5, 0x30, 0x10, 10, 1), PIN_FIELD_BASE(12, 12, 5, 0x30, 0x10, 7, 1), @@ -404,8 +404,8 @@ static const struct mtk_pin_field_calc mt7981_pin_r0_range[] = { PIN_FIELD_BASE(6, 6, 4, 0x40, 0x10, 3, 1), PIN_FIELD_BASE(7, 7, 4, 0x40, 0x10, 0, 1), PIN_FIELD_BASE(8, 8, 4, 0x40, 0x10, 4, 1), - PIN_FIELD_BASE(9, 9, 4, 0x40, 0x10, 9, 1), + PIN_FIELD_BASE(9, 9, 5, 0x40, 0x10, 9, 1), PIN_FIELD_BASE(10, 10, 5, 0x40, 0x10, 8, 1), PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1), PIN_FIELD_BASE(12, 12, 5, 0x40, 0x10, 7, 1), @@ -454,8 +454,8 @@ static const struct mtk_pin_field_calc mt7981_pin_r1_range[] = { PIN_FIELD_BASE(6, 6, 4, 0x50, 0x10, 3, 1), PIN_FIELD_BASE(7, 7, 4, 0x50, 0x10, 0, 1), PIN_FIELD_BASE(8, 8, 4, 0x50, 0x10, 4, 1), - PIN_FIELD_BASE(9, 9, 4, 0x50, 0x10, 9, 1), + PIN_FIELD_BASE(9, 9, 5, 0x50, 0x10, 9, 1), PIN_FIELD_BASE(10, 10, 5, 0x50, 0x10, 8, 1), PIN_FIELD_BASE(11, 11, 5, 0x50, 0x10, 10, 1), PIN_FIELD_BASE(12, 12, 5, 0x50, 0x10, 7, 1), -- 2.51.0
