On 12/10/25 3:17 PM, Mathieu Othacehe wrote:
As in Linux with d78c0ced60 ("net: ravb: Make write access to CXR35 first
before accessing other EMAC register"), configure CXR31 and CXR35 correctly
on rzg2. MII mode does not work correctly unless those registers are
properly configured.

Signed-off-by: Mathieu Othacehe <[email protected]>
Applied and scheduled for 2026.01 , thanks !

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