This series enables USB3 Super-Speed functionality on QCM6490 and SC7280 platforms by adding support for the QMP USB3-DP Combo PHY. The combo PHY is a dual-mode PHY that can operate in either USB3 or DisplayPort mode, and this implementation focuses on USB3 mode to enable Super-Speed USB support.
The series adds the necessary clock support, implements the QMP Combo PHY driver ported from upstream Linux, and makes USB speed fixup configurable. Balaji Selvanathan (6): drivers: clk: qcom: sc7280: Add USB3 PHY pipe clock drivers: usb: dwc3: Add delay after core soft reset drivers: phy: qcom: Add QMP USB3-DP Combo PHY driver arch: arm: mach-snapdragon: Make USB speed fixup configurable arch: arm: dts: qcs6490-rb3gen2: Override USB3 PHY clocks configs: qcm6490: Enable super-speed USB support arch/arm/dts/qcs6490-rb3gen2-u-boot.dtsi | 8 + arch/arm/mach-snapdragon/Kconfig | 10 + arch/arm/mach-snapdragon/of_fixup.c | 4 + configs/qcm6490_defconfig | 5 + drivers/clk/qcom/clock-sc7280.c | 1 + drivers/phy/qcom/Kconfig | 8 + drivers/phy/qcom/Makefile | 1 + drivers/phy/qcom/phy-qcom-qmp-combo.c | 503 +++++++++++++++++++++ drivers/phy/qcom/phy-qcom-qmp-common.h | 62 +++ drivers/phy/qcom/phy-qcom-qmp-dp-com-v3.h | 18 + drivers/phy/qcom/phy-qcom-qmp-pcs-usb-v4.h | 34 ++ drivers/phy/qcom/phy-qcom-qmp.h | 17 + drivers/usb/dwc3/core.c | 2 + 13 files changed, 673 insertions(+) create mode 100644 drivers/phy/qcom/phy-qcom-qmp-combo.c create mode 100644 drivers/phy/qcom/phy-qcom-qmp-common.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-dp-com-v3.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-usb-v4.h -- 2.34.1
