Hi Peter,
On 11/16/2025 10:55 AM, Peter Robinson wrote:
> Hey Jonas,
>
>> The SCMI shared memory area is no longer automatically marked as
>> non-cacheable after the commit a5a0134570c8 ("firmware: scmi: Drop
>> mmu_set_region_dcache_behaviour() misuse").
>>
>> This change in behavior cause Rockchip RK3588 boards to fail boot with:
>>
>> SoC: RK3588
>> DRAM: 8 GiB
>> scmi-over-smccc scmi: Channel unexpectedly busy
>> scmi_base_drv scmi-base.0: getting protocol version failed
>> scmi-over-smccc scmi: failed to probe base protocol
>> initcall_run_r(): initcall initr_dm() failed
>> ### ERROR ### Please RESET the board ###
>>
>> Update the memory mapping on RK3588 to mark the SCMI shared memory area
>> as non-cacheable to fix the SCMI shared memory based transport issue
>> that prevented RK3588 boards from booting.
>
> Will the other newer rockchips rk356x devices which use SCMI need this fix
> too?
Most RK35xx SoCs only use SCMI clks for CPU, GPU and NPU, however RK3588
also use SCMI clks for sdmmc and because of this is the only RK SoC in
U-Boot that auto imply SCMI_FIRMWARE and CLK_SCMI Kconfig options.
Other boards with RK35xx SoCs could be affected in case the SCMI Kconfig
options are enabled by a user when building U-Boot.
Ideally we could look for /reserved-memory/shmem nodes, however they
seem to use wrong size, 0x100 instead of the actual used 0x1000 size:
#define SCMI_SHARE_MEM_SIZE SIZE_K(4)
For now I just fixed RK3588 to get boards booting using latest master.
Regards,
Jonas
>
>> Signed-off-by: Jonas Karlman <[email protected]>
>> ---
>> arch/arm/mach-rockchip/rk3588/rk3588.c | 15 ++++++++++++++-
>> 1 file changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
>> b/arch/arm/mach-rockchip/rk3588/rk3588.c
>> index c01a40020896..55d2caab4fec 100644
>> --- a/arch/arm/mach-rockchip/rk3588/rk3588.c
>> +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
>> @@ -63,7 +63,20 @@ static struct mm_region rk3588_mem_map[] = {
>> {
>> .virt = 0x0UL,
>> .phys = 0x0UL,
>> - .size = 0xf0000000UL,
>> + .size = 0x10f000UL,
>> + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
>> + PTE_BLOCK_INNER_SHARE
>> + }, {
>> + /* SCMI shared memory area must be mapped as non-cacheable.
>> */
>> + .virt = 0x10f000UL,
>> + .phys = 0x10f000UL,
>> + .size = 0x1000UL,
>> + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
>> + PTE_BLOCK_INNER_SHARE
>> + }, {
>> + .virt = 0x110000UL,
>> + .phys = 0x110000UL,
>> + .size = 0xefef0000UL,
>> .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
>> PTE_BLOCK_INNER_SHARE
>> }, {
>> --
>> 2.51.2
>>
