The Tegra SoC is a bit special, as it doesn't have the separate IP block
to provide watchdog functionality.
Instead, timer IP block allows such functionality when properly configured.
This patch manually binds U-Boot's WDT driver (based on WDT_UCLASS).
Signed-off-by: Lukasz Majewski <lu...@nabladev.com>
---
Changes for v2:
- Replace "Tegra T30" with just "Tegra" in comment as all Tegra
SoCs are using the same programming paradign
- Update the commit message
---
drivers/timer/tegra-timer.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/timer/tegra-timer.c b/drivers/timer/tegra-timer.c
index 3545424889d..0d78000a989 100644
--- a/drivers/timer/tegra-timer.c
+++ b/drivers/timer/tegra-timer.c
@@ -11,6 +11,8 @@
#include <asm/arch/clock.h>
#include <asm/arch/tegra.h>
+#include <dm/lists.h>
+
#define TEGRA_OSC_CLK_ENB_L_SET (NV_PA_CLK_RST_BASE + 0x320)
#define TEGRA_OSC_SET_CLK_ENB_TMR BIT(5)
@@ -106,6 +108,21 @@ static int tegra_timer_probe(struct udevice *dev)
return 0;
}
+static int tegra_timer_bind(struct udevice *dev)
+{
+ /*
+ * In Tegra SoC the Watchdog is accomplished
+ * by the timer IP block (timer5).
+ */
+ if (CONFIG_IS_ENABLED(WDT_TEGRA))
+ return device_bind_driver_to_node(dev, "tegra_wdt",
+ "tegra-wdt",
+ dev_ofnode(dev),
+ NULL);
+
+ return 0;
+}
+
static const struct timer_ops tegra_timer_ops = {
.get_count = tegra_timer_get_count,
};
@@ -124,6 +141,7 @@ U_BOOT_DRIVER(tegra_timer) = {
.id = UCLASS_TIMER,
.of_match = tegra_timer_ids,
.probe = tegra_timer_probe,
+ .bind = tegra_timer_bind,
.ops = &tegra_timer_ops,
.flags = DM_FLAG_PRE_RELOC,
};
--
2.39.5
