On 9/5/25 11:18 AM, Anshul Dalal wrote:
Hi all,
In U-Boot, TI only provides a single memory map for all k3 platforms, this
does not scale for devices where atf and optee lie outside the range 0x80000000
- 0x80080000 and 0x9e780000 - 0xa0000000 respectively.
There are also issues for devices with < 2GiB of memory (eg am62SiP with 512MiB
of RAM) as the maximum size for the first DRAM bank is hardcoded to 2GiB.
Furthermore the second DRAM bank is mapped even for devices that only have one.
Therefore this patch set adds the required functionality to create the MMU table
at runtime.
The patch set has been build tested on all effected platforms but boot-tested
only on TI's K3 EVMs and the beagleplay.
The following effected boards have not been boot tested:
- phycore-am62a
- phycore-am62x
- phycore-am64x
- verdin-am62
- iot2050
Depends on:
[PATCH v1] mach-k3: fix reading size and addr from fdt on R5
https://lore.kernel.org/u-boot/20250903111704.530700-1-ansh...@ti.com/
For this series,
Tested-by: Wadim Egorov <w.ego...@phytec.de> # phycore-am6*
Best Wishes,
Anshul
---
Changes in v6:
- Make use of generic MMU APIs
- Extend core U-Boot functionality by adding mmu_unmap_reserved_mem and
mem_map_fix_dram_banks
- Keep same memory maps for SPL and U-Boot proper
- Add fdt fixups from SPL stage for reserved memory nodes
v5: https://lore.kernel.org/u-boot/20250703133533.104758-1-ansh...@ti.com/
Changes in v5:
- Don't create carveouts for every reserved-memory node
- Only create carveouts for ATF/OP-TEE
- Expand the call to k3_mem_map_init to vendor boards as well
- Map area for framebuffer for CONFIG_VIDEO=y platforms
v4: https://lore.kernel.org/u-boot/20250618124210.1936140-1-ansh...@ti.com/
Changes for v4:
- Add call to k3_mem_map_init for beagleplay
- Mark reserved regions as non-cacheable
- More debug logs
v3: https://lore.kernel.org/u-boot/20250617135844.2873701-1-ansh...@ti.com/
Changes for v3:
- Remove unused memory regions in SPL's map
- Add runtime addition of MMU entry for the framebuffer in SPL
- Refactor k3_mem_map_init to use standard u-boot APIs
- Unmap reserved-memory regions instead of keeping them uncached
v2: https://lore.kernel.org/u-boot/20250610160833.1705534-1-ansh...@ti.com/
Changes in v2:
- Removed dependency to:
https://lore.kernel.org/u-boot/20250522150941.563959-1-ansh...@ti.com/
v1: https://lore.kernel.org/u-boot/20250602120054.1466951-1-ansh...@ti.com/
---
Anshul Dalal (9):
mach-k3: use minimal memory map for all K3
mach-k3: use custom enable_cache
arm: armv8: mmu: export mmu_setup
arm: armv8: mmu: add mem_map_fix_dram_banks
mach-k3: map all banks using mem_map_fix_dram_banks
arm: armv8: mmu: add mmu_unmap_reserved_mem
spl: split spl_board_fixups to arch/board specific
mach-k3: add reserved memory fixups for next boot stage
mach-k3: add carveouts for TFA and optee
arch/arm/cpu/armv7m/cpu.c | 2 +-
arch/arm/cpu/armv8/cache_v8.c | 50 ++++++++++++++++++++
arch/arm/include/asm/armv8/mmu.h | 24 ++++++++++
arch/arm/mach-k3/arm64/arm64-mmu.c | 35 +++++---------
arch/arm/mach-k3/common.c | 55 ++++++++++++++++++++++
arch/arm/mach-k3/include/mach/k3-ddr.h | 6 +++
arch/arm/mach-rockchip/spl-boot-order.c | 2 +-
arch/arm/mach-socfpga/spl_soc64.c | 2 +-
board/beagle/beagley-ai/beagley-ai.c | 2 +-
board/dhelectronics/dh_stm32mp1/board.c | 2 +-
board/phytec/phycore_am62x/phycore-am62x.c | 2 +-
board/phytec/phycore_am64x/phycore-am64x.c | 2 +-
board/renesas/sparrowhawk/sparrowhawk.c | 2 +-
board/starfive/visionfive2/spl.c | 2 +-
board/ti/am62ax/evm.c | 2 +-
board/ti/am62px/evm.c | 2 +-
board/ti/am62x/evm.c | 2 +-
board/ti/am64x/evm.c | 2 +-
board/ti/j721e/evm.c | 2 +-
board/ti/j721s2/evm.c | 2 +-
board/ti/j722s/evm.c | 2 +-
board/ti/j784s4/evm.c | 2 +-
common/spl/spl.c | 12 +++--
include/spl.h | 12 +++--
24 files changed, 182 insertions(+), 46 deletions(-)
