According to the documentation of the UART controller in the APQ8016E TRM,
clearing bits inside UARTDM_DMEN requires resetting the transmitter and/or
receiver. We do reset inside uart_dm_init(), but before writing to
UARTDM_DMEN. This doesn't seem to cause problems in practice, but let's
move the reset to the end of uart_dm_init() to better match the
recommendations in the documentation.
Reviewed-by: Neil Armstrong <neil.armstr...@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerh...@linaro.org>
---
drivers/serial/serial_msm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index
aa4d10e7c5138f919978272e4967ece8293073b3..5523ec4afe17f242d61bc2ec4b4534b5b974434c
100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -219,11 +219,12 @@ static void uart_dm_init(struct msm_serial_data *priv)
/* Enable RS232 flow control to support RS232 db9 connector */
writel(UARTDM_MR1_RX_RDY_CTL, priv->base + UARTDM_MR1);
writel(UARTDM_MR2_8_N_1_MODE, priv->base + UARTDM_MR2);
- writel(UARTDM_CR_CMD_RESET_RX, priv->base + UARTDM_CR);
- writel(UARTDM_CR_CMD_RESET_TX, priv->base + UARTDM_CR);
/* Make sure BAM/single character mode is disabled */
writel(0x0, priv->base + UARTDM_DMEN);
+
+ writel(UARTDM_CR_CMD_RESET_RX, priv->base + UARTDM_CR);
+ writel(UARTDM_CR_CMD_RESET_TX, priv->base + UARTDM_CR);
}
static int msm_serial_probe(struct udevice *dev)
{
--
2.50.1
