On 2025/7/12 06:21, Jonas Karlman wrote:
From: Nicolas Frattaroli <nicolas.frattar...@collabora.com> The RK3576 has a hardware random number generator IP built into the SoC. Add it to the SoC's .dtsi, now that there's a binding and driver for it. Signed-off-by: Nicolas Frattaroli <nicolas.frattar...@collabora.com> Link: https://lore.kernel.org/r/20250430-rk3576-hwrng-v1-3-480c15b58...@collabora.com Signed-off-by: Heiko Stuebner <he...@sntech.de> [ upstream commit: 5268f3b5d29887480011b44567bcbf0d422cda94 ] (cherry picked from commit 25cfcb091747900639f2b5df297d26b3a6ca3989) Signed-off-by: Jonas Karlman <jo...@kwiboo.se>
Reviewed-by: Kever Yang <kever.y...@rock-chips.com> Thanks, - Kever
--- v2: New patch --- dts/upstream/src/arm64/rockchip/rk3576.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/dts/upstream/src/arm64/rockchip/rk3576.dtsi b/dts/upstream/src/arm64/rockchip/rk3576.dtsi index ebb5fc8bb8b1..50332ec6e0de 100644 --- a/dts/upstream/src/arm64/rockchip/rk3576.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3576.dtsi @@ -1419,6 +1419,14 @@ status = "disabled"; };+ rng: rng@2a410000 {+ compatible = "rockchip,rk3576-rng"; + reg = <0x0 0x2a410000 0x0 0x200>; + clocks = <&cru HCLK_TRNG_NS>; + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>; + resets = <&cru SRST_H_TRNG_NS>; + }; + otp: otp@2a580000 { compatible = "rockchip,rk3576-otp"; reg = <0x0 0x2a580000 0x0 0x400>;
