Hi Yannic, On 15.08.25 10:51, Yannic Moog wrote: > Hi Benjamin, > > did you miss some of my review comments on v1? > I'll reiterate below.. > > Am Donnerstag, dem 14.08.2025 um 15:54 +0200 schrieb Benjamin Hahn: >> Add new imx8mp-libra-fpsc board. >> USB is not working yet, as the entry in the upstream devicetree is >> missing. >> Bootph tags are in u-boot.dtsi for now and will be removed when >> upstreamed. > I see the following errors on my board: > > Loading Environment from MMC... esdhc_change_pinstate 9 error > esdhc_set_timing error -38 > *** Warning - bad CRC, using default environment > > Reading from MMC(1)... In: serial@30a60000 > Out: serial@30a60000 > Err: serial@30a60000 > SEC0: RNG instantiated > Net: Invalid PHY interface > eqos_probe_resources() failed: -22 > No ethernet found. > > Please check (and fix if you determine it is not a hardware error). I don't see any of these errors on my board. > >> Signed-off-by: Benjamin Hahn <b.h...@phytec.de> >> --- >> Add support for imx8mp-libra-fpsc board. >> --- >> Changes in v2: >> - Review comments from v1 (too many to list them all) >> - removed the first two patches (devicetree is now in of_upstream) >> - added the latest version of ram timings >> - add optee support (libra is now in upstream optee) >> - add CONFIG_CMD_MMC_REG command for mmc reg read command >> - Link to v1: >> https://lore.kernel.org/r/20250725-imx8mp-libra-initial-support-v1-0-d9982df21...@phytec.de >> --- >> arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi | 78 + >> arch/arm/mach-imx/imx8m/Kconfig | 9 + >> board/phytec/imx8mp-libra-fpsc/Kconfig | 16 + >> board/phytec/imx8mp-libra-fpsc/MAINTAINERS | 9 + >> board/phytec/imx8mp-libra-fpsc/Makefile | 10 + >> board/phytec/imx8mp-libra-fpsc/imx8mp-libra-fpsc.c | 99 ++ >> .../phytec/imx8mp-libra-fpsc/imx8mp-libra-fpsc.env | 25 + >> board/phytec/imx8mp-libra-fpsc/imximage-8mp-sd.cfg | 9 + >> board/phytec/imx8mp-libra-fpsc/lpddr4_timing.c | 1814 >> ++++++++++++++++++++ >> board/phytec/imx8mp-libra-fpsc/spl.c | 132 ++ >> configs/imx8mp-libra-fpsc_defconfig | 175 ++ >> doc/board/phytec/imx8mp-libra-fpsc.rst | 77 + > Did you forget to add this file to the toctree? Oh, yes forgot that. > >> include/configs/imx8mp-libra-fpsc.h | 27 + >> 13 files changed, 2480 insertions(+) >> >> > [...] > >> diff --git a/arch/arm/mach-imx/imx8m/Kconfig >> b/arch/arm/mach-imx/imx8m/Kconfig >> index 74416a788473..cb4508a7110e 100644 >> --- a/arch/arm/mach-imx/imx8m/Kconfig >> +++ b/arch/arm/mach-imx/imx8m/Kconfig >> @@ -345,6 +345,14 @@ config TARGET_PHYCORE_IMX8MP >> select IMX8M_LPDDR4 >> imply OF_UPSTREAM >> >> +config TARGET_IMX8MP_LIBRA_FPSC >> + bool "PHYTEC Libra i.MX 8M Plus FPSC" >> + select IMX8MP >> + select SUPPORT_SPL >> + select IMX8M_LPDDR4 > no imply OF_UPSTREAM needed? I don't know. I did not run into issues without it and it built the dts upstream devicetree also without the OF_UPSTREAM implication. > >> + help >> + i.MX8M Plus Libra FPSC is a SBC based on the NXP i.MX 8M Plus SoC. > Libra i.MX 8M Plus FPSC is an SBC based on the NXP i.MX 8M Plus SoC. I believe it is "a SBC" not "an SBC" since SBC does not start with a vocal. > >> + >> config TARGET_IMX8MM_CL_IOT_GATE >> bool "CompuLab iot-gate-imx8" >> select IMX8MM >> > [...] > >> diff --git a/board/phytec/imx8mp-libra-fpsc/MAINTAINERS >> b/board/phytec/imx8mp- >> libra-fpsc/MAINTAINERS >> new file mode 100644 >> index 000000000000..fe98eab03eb3 >> --- /dev/null >> +++ b/board/phytec/imx8mp-libra-fpsc/MAINTAINERS >> @@ -0,0 +1,9 @@ >> +Libra-i.MX 8M Plus > Libra i.MX 8M Plus FPSC > >> +M: Teresa Remmet <t.rem...@phytec.de> >> +W: >> https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-8m-plus-fpsc/ >> +S: Maintained >> +F: arch/arm/dts/imx8mp-libra-rdk-fpsc-u-boot.dtsi >> +F: board/phytec/imx8mp-libra-fpsc/ >> +F: configs/imx8mp-libra-fpsc_defconfig >> +F: include/configs/imx8mp-libra-fpsc.h >> +F: doc/board/phytec/imx8mp-libra-fpsc.rst > nit: indent error? > > [...] > >> diff --git a/board/phytec/imx8mp-libra-fpsc/imx8mp-libra-fpsc.env >> b/board/phytec/imx8mp-libra-fpsc/imx8mp-libra-fpsc.env >> new file mode 100644 >> index 000000000000..d0179bc90a27 >> --- /dev/null >> +++ b/board/phytec/imx8mp-libra-fpsc/imx8mp-libra-fpsc.env >> @@ -0,0 +1,25 @@ > What do you think about putting all the standard boot variables at the > beginning > of RAM and LOAD ADDR after that to avoid potential collisions? > See phycore-imx8mm and tauri for reference.
I guess we could do that if you believe this is a better place, I don't really have any preferences here. Since you will take it from here, it is your choice. > >> +bootmeths=script >> +boot_targets=mmc2 mmc1 ethernet >> +boot_script_dhcp=boot.scr.uimg >> +bootenv_addr_r=0x49100000 >> +console=ttymxc3,115200 >> +emmc_dev=2 /* This is needed by built-in uuu flash scripts */ >> +fdt_addr_r=0x48000000 >> +fdtoverlay_addr_r=0x49000000 >> +fit_fdtconf=conf-imx8mp-libra-rdk-fpsc.dtb >> +ip_dyn=yes >> +kernel_addr_r=0x5A080000 >> +kernel_comp_addr_r=0x60000000 >> +kernel_comp_size=0x2000000 >> +mmcautodetect=yes >> +mmcdev=CONFIG_SYS_MMC_ENV_DEV >> +mmcpart=1 >> +mmcroot=2 >> +nfsroot=/srv/nfs >> +no_bootenv=0 >> +pxefile_addr_r=0x58600000 >> +ramdisk_addr_r=0x5e000000 >> +sd_dev=1 /* This is needed by built-in uuu flash scripts */ >> +script_offset_f=0x400000 >> +script_size_f=0x2000 >> +scriptaddr=0x58500000 >> > [...] > >> diff --git a/configs/imx8mp-libra-fpsc_defconfig b/configs/imx8mp-libra- >> fpsc_defconfig >> new file mode 100644 >> index 000000000000..54e46246c4c1 >> --- /dev/null >> +++ b/configs/imx8mp-libra-fpsc_defconfig >> @@ -0,0 +1,175 @@ >> +CONFIG_ARM=y >> +CONFIG_ARCH_IMX8M=y >> +CONFIG_TEXT_BASE=0x40200000 >> +CONFIG_SYS_MALLOC_LEN=0x2000000 >> +CONFIG_SPL_GPIO=y >> +CONFIG_SPL_LIBCOMMON_SUPPORT=y >> +CONFIG_SPL_LIBGENERIC_SUPPORT=y >> +CONFIG_SF_DEFAULT_SPEED=80000000 >> +CONFIG_ENV_SIZE=0x10000 >> +CONFIG_ENV_OFFSET=0x3C0000 >> +CONFIG_ENV_SECT_SIZE=0x10000 >> +CONFIG_SYS_I2C_MXC_I2C1=y >> +CONFIG_DM_GPIO=y >> +CONFIG_DEFAULT_DEVICE_TREE="freescale/imx8mp-libra-rdk-fpsc" >> +CONFIG_IMX8M_OPTEE_LOAD_ADDR=0x7e000000 >> +CONFIG_TARGET_IMX8MP_LIBRA_FPSC=y >> +CONFIG_OF_LIBFDT_OVERLAY=y >> +CONFIG_SYS_MONITOR_LEN=524288 >> +CONFIG_SPL_MMC=y >> +CONFIG_SPL_SERIAL=y >> +CONFIG_SPL_DRIVERS_MISC=y >> +CONFIG_SPL_STACK=0x960000 >> +CONFIG_SPL_TEXT_BASE=0x920000 >> +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y >> +CONFIG_SPL_BSS_START_ADDR=0x98fc00 >> +CONFIG_SPL_BSS_MAX_SIZE=0x400 >> +CONFIG_SYS_LOAD_ADDR=0x40480000 >> +CONFIG_SPL=y >> +CONFIG_ENV_OFFSET_REDUND=0x3e0000 >> +CONFIG_IMX_BOOTAUX=y >> +CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 >> +# CONFIG_ANDROID_BOOT_IMAGE is not set >> +CONFIG_FIT=y >> +CONFIG_FIT_EXTERNAL_OFFSET=0x3000 >> +CONFIG_SPL_LOAD_FIT=y >> +CONFIG_BOOTSTD_FULL=y >> +CONFIG_OF_SYSTEM_SETUP=y >> +CONFIG_FDT_FIXUP_PARTITIONS=y >> +CONFIG_SYS_CBSIZE=2048 >> +CONFIG_SYS_PBSIZE=2074 >> +CONFIG_BOARD_LATE_INIT=y >> +CONFIG_SPL_MAX_SIZE=0x26000 >> +CONFIG_SPL_BOARD_INIT=y >> +CONFIG_SPL_BOOTROM_SUPPORT=y >> +CONFIG_SPL_SYS_MALLOC_SIMPLE=y >> +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set >> +CONFIG_SPL_HAVE_INIT_STACK=y >> +CONFIG_SPL_SYS_MALLOC=y >> +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y >> +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000 >> +CONFIG_SPL_SYS_MALLOC_SIZE=0x80000 >> +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y >> +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 >> +CONFIG_SPL_I2C=y >> +CONFIG_SPL_NOR_SUPPORT=y >> +CONFIG_SPL_POWER=y >> +CONFIG_SPL_WATCHDOG=y >> +CONFIG_SYS_PROMPT="u-boot=> " >> +CONFIG_CMD_ERASEENV=y >> +CONFIG_CMD_EEPROM=y >> +CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 >> +CONFIG_SYS_EEPROM_SIZE=4096 >> +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 >> +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 >> +CONFIG_CMD_CLK=y >> +CONFIG_CMD_FUSE=y >> +CONFIG_CMD_GPIO=y >> +CONFIG_CMD_I2C=y >> +CONFIG_CMD_MMC=y >> +CONFIG_CMD_MMC_REG=y >> +CONFIG_CMD_MTD=y >> +CONFIG_CMD_SF_TEST=y >> +CONFIG_CMD_USB=y >> +CONFIG_CMD_USB_SDP=y >> +CONFIG_CMD_USB_MASS_STORAGE=y >> +CONFIG_CMD_CACHE=y >> +CONFIG_CMD_REGULATOR=y >> +CONFIG_CMD_EXT4_WRITE=y >> +CONFIG_CMD_MTDPARTS=y >> +CONFIG_OF_CONTROL=y >> +CONFIG_SPL_OF_CONTROL=y >> +CONFIG_OF_UPSTREAM=y >> +CONFIG_ENV_OVERWRITE=y >> +CONFIG_ENV_IS_IN_MMC=y >> +CONFIG_ENV_IS_IN_SPI_FLASH=y >> +CONFIG_ENV_REDUNDANT=y >> +CONFIG_ENV_RELOC_GD_ENV_ADDR=y >> +CONFIG_ENV_MMC_DEVICE_INDEX=2 >> +CONFIG_NET_RANDOM_ETHADDR=y >> +CONFIG_SPL_DM=y >> +CONFIG_CLK_COMPOSITE_CCF=y >> +CONFIG_SPL_CLK_IMX8MP=y >> +CONFIG_CLK_IMX8MP=y >> +CONFIG_FSL_CAAM=y >> +CONFIG_USB_FUNCTION_FASTBOOT=y >> +CONFIG_FASTBOOT_BUF_ADDR=0x42800000 >> +CONFIG_FASTBOOT_BUF_SIZE=0x13000000 >> +CONFIG_FASTBOOT_FLASH=y >> +CONFIG_FASTBOOT_UUU_SUPPORT=y >> +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 >> +CONFIG_FASTBOOT_MMC_BOOT_SUPPORT=y >> +CONFIG_FASTBOOT_MMC_BOOT1_NAME="mmc2boot0" >> +CONFIG_FASTBOOT_MMC_BOOT2_NAME="mmc2boot1" >> +CONFIG_FASTBOOT_MMC_USER_SUPPORT=y >> +CONFIG_FASTBOOT_MMC_USER_NAME="mmc2" >> +CONFIG_MXC_GPIO=y >> +CONFIG_DM_I2C=y >> +# CONFIG_SPL_DM_I2C is not set >> +CONFIG_SPL_SYS_I2C_LEGACY=y >> +CONFIG_I2C_EEPROM=y >> +CONFIG_SYS_I2C_EEPROM_ADDR=0x51 >> +CONFIG_SUPPORT_EMMC_BOOT=y >> +CONFIG_MMC_IO_VOLTAGE=y >> +CONFIG_MMC_UHS_SUPPORT=y >> +CONFIG_MMC_HS400_ES_SUPPORT=y >> +CONFIG_MMC_HS400_SUPPORT=y >> +CONFIG_FSL_USDHC=y >> +CONFIG_MTD=y >> +CONFIG_DM_MTD=y >> +CONFIG_DM_SPI_FLASH=y >> +CONFIG_SPI_FLASH_BAR=y >> +CONFIG_SPI_FLASH_MACRONIX=y >> +CONFIG_SPI_FLASH_SPANSION=y >> +CONFIG_SPI_FLASH_STMICRO=y >> +CONFIG_SPI_FLASH_SST=y >> +CONFIG_SPI_FLASH_WINBOND=y >> +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set >> +CONFIG_SPI_FLASH_MTD=y >> +CONFIG_PHY_TI_DP83867=y >> +CONFIG_DM_ETH_PHY=y >> +CONFIG_PHY_GIGE=y >> +CONFIG_DWC_ETH_QOS=y >> +CONFIG_DWC_ETH_QOS_IMX=y >> +CONFIG_FEC_MXC=y >> +CONFIG_RGMII=y >> +CONFIG_MII=y >> +CONFIG_PHY_IMX8MQ_USB=y >> +CONFIG_PINCTRL=y >> +CONFIG_SPL_PINCTRL=y >> +CONFIG_PINCTRL_IMX8M=y >> +CONFIG_SPL_POWER_LEGACY=y >> +CONFIG_POWER_DOMAIN=y >> +CONFIG_IMX8M_POWER_DOMAIN=y >> +CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y >> +CONFIG_POWER_PCA9450=y >> +CONFIG_DM_REGULATOR=y >> +CONFIG_DM_REGULATOR_FIXED=y >> +CONFIG_DM_REGULATOR_GPIO=y >> +CONFIG_SPL_POWER_I2C=y >> +CONFIG_DM_RNG=y >> +CONFIG_DM_SERIAL=y >> +CONFIG_MXC_UART=y >> +CONFIG_SPI=y >> +CONFIG_DM_SPI=y >> +CONFIG_NXP_FSPI=y >> +CONFIG_SYSRESET=y >> +CONFIG_SPL_SYSRESET=y >> +CONFIG_SYSRESET_PSCI=y >> +CONFIG_SYSRESET_WATCHDOG=y >> +CONFIG_TEE=y >> +CONFIG_OPTEE=y > You enabled TEE and OPTEE here, but doc says OP-TEE is optional. > > You can technically get away with it when you compile tf-a without SPD=opteed, > but I don't think that's the spirit when we turn on TEE configs. > >> +CONFIG_DM_THERMAL=y >> +CONFIG_USB=y >> +CONFIG_DM_USB_GADGET=y >> +CONFIG_USB_XHCI_HCD=y >> +CONFIG_USB_XHCI_DWC3=y >> +CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y >> +CONFIG_USB_EHCI_HCD=y >> +CONFIG_USB_DWC3=y >> +CONFIG_USB_DWC3_GENERIC=y >> +CONFIG_USB_GADGET=y >> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" >> +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 >> +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 >> +CONFIG_IMX_WATCHDOG=y >> diff --git a/doc/board/phytec/imx8mp-libra-fpsc.rst >> b/doc/board/phytec/imx8mp- >> libra-fpsc.rst >> new file mode 100644 >> index 000000000000..8c38fdd9203c >> --- /dev/null >> +++ b/doc/board/phytec/imx8mp-libra-fpsc.rst >> @@ -0,0 +1,77 @@ >> +.. SPDX-License-Identifier: GPL-2.0+ >> + >> +Libra i.MX 8M Plus FPSC >> +======================= >> + >> +The Libra i.MX 8M Plus FPSC is a SBC based with the phyCORE-i.MX 8M Plus >> FPSC >> +SoM. >> +The phyCORE-i.MX 8M Plus FPSC with 2GB of main memory is supported. >> + >> +Quick Start >> +----------- >> + >> +- Build the ARM Trusted firmware binary >> +- Build the OP-TEE binary (optional) >> +- Get ddr firmware >> +- Build U-Boot >> +- Boot >> + >> +Build the ARM Trusted firmware binary >> +------------------------------------- >> + >> +.. code-block:: bash >> + >> + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git >> + $ cd trusted-firmware-a >> + $ export CROSS_COMPILE=aarch64-linux-gnu- >> + $ export IMX_BOOT_UART_BASE=0x30A60000 >> + $ # with optee >> + $ make PLAT=imx8mp SPD=opteed BL32_BASE=0x7e000000 bl31 >> + >> +Build the OP-TEE binary >> +---------------------------------- > line too long > >> + >> +.. code-block:: bash >> + >> + $ git clone https://github.com/OP-TEE/optee_os.git >> + $ cd optee_os >> + $ make CFG_TEE_BENCHMARK=n \ >> + CROSS_COMPILE=aarch64-linux-gnu- \ >> + O=out/arm \ >> + PLATFORM=imx-mx8mp_libra_fpsc >> + >> +Get the ddr firmware >> +-------------------- >> + >> +.. code-block:: bash >> + >> + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.19.bin >> + $ chmod +x firmware-imx-8.19.bin >> + $ ./firmware-imx-8.19.bin > Why use such an old version of the firmware? I did not find a downloadlink for the .bin file of a newer version, so I tested with the old version and it worked. You can of course add the newer version if you like. > >> + >> +Build U-Boot for SD card >> +------------------------ >> + >> +Copy binaries >> +^^^^^^^^^^^^^ >> + >> +.. code-block:: bash >> + >> + $ cp <TF-A dir>/build/imx8mp/release/bl31.bin . >> + $ cp <OP-TEE dir>/out/arm/core/tee-raw.bin tee.bin >> + $ cp firmware-imx-8.19/firmware/ddr/synopsys/lpddr4*.bin . >> + >> +Build U-Boot >> +^^^^^^^^^^^^ >> + >> +.. code-block:: bash >> + >> + $ make imx8mp-libra-fpsc_defconfig > make imx8mp-libra-fpsc_defconfig flash.bin ? > > One command fewer to copy/execute. If it works, sure I guess. Benjamin > > Yannic > >> + $ make flash.bin >> + >> +Flash SD card >> +^^^^^^^^^^^^^ >> + >> +.. code-block:: bash >> + >> + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=fsync >> > [...] > >> --- >> base-commit: 021783860f7e628f7c4e0c101707cd4250e6d61f >> change-id: 20250725-imx8mp-libra-initial-support-d94282386ff6 >> >> Best regards,
