From: Ryan Wanner <ryan.wan...@microchip.com>
Add support for new SoC sama7d65.
Signed-off-by: Ryan Wanner <ryan.wan...@microchip.com>
---
arch/arm/mach-at91/Kconfig | 5 +
arch/arm/mach-at91/armv7/Makefile | 1 +
arch/arm/mach-at91/armv7/sama7d65_devices.c | 31 ++++++
arch/arm/mach-at91/include/mach/hardware.h | 2 +
arch/arm/mach-at91/include/mach/sama7d65.h | 107 ++++++++++++++++++++
5 files changed, 146 insertions(+)
create mode 100644 arch/arm/mach-at91/armv7/sama7d65_devices.c
create mode 100644 arch/arm/mach-at91/include/mach/sama7d65.h
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index d21534ce883..cc9ed89e544 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -52,6 +52,11 @@ config SAMA7G5
select CPU_V7A
select AT91RESET_EXTRST
+config SAMA7D65
+ bool
+ select CPU_V7A
+ select AT91RESET_EXTRST
+
config SAMA5D2
bool
select CPU_V7A
diff --git a/arch/arm/mach-at91/armv7/Makefile
b/arch/arm/mach-at91/armv7/Makefile
index 6da1cdffef6..4303a60e0e3 100644
--- a/arch/arm/mach-at91/armv7/Makefile
+++ b/arch/arm/mach-at91/armv7/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_SAMA5D2) += sama5d2_devices.o clock.o
obj-$(CONFIG_SAMA5D3) += sama5d3_devices.o clock.o
obj-$(CONFIG_SAMA5D4) += sama5d4_devices.o clock.o
obj-$(CONFIG_SAMA7G5) += sama7g5_devices.o
+obj-$(CONFIG_SAMA7D65) += sama7d65_devices.o
obj-y += cpu.o
ifneq ($(CONFIG_ATMEL_TCB_TIMER),y)
ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
diff --git a/arch/arm/mach-at91/armv7/sama7d65_devices.c
b/arch/arm/mach-at91/armv7/sama7d65_devices.c
new file mode 100644
index 00000000000..6c6ae751b1a
--- /dev/null
+++ b/arch/arm/mach-at91/armv7/sama7d65_devices.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Microchip Technology, Inc.
+ */
+
+#include <asm/arch/sama7d65.h>
+
+char *get_cpu_name(void)
+{
+ unsigned int extension_id = get_extension_chip_id();
+
+ if (cpu_is_sama7d65())
+ switch (extension_id) {
+ case ARCH_EXID_SAMA7D65:
+ return "SAMA7D65";
+ case ARCH_EXID_SAMA7D65_DD2:
+ return "SAMA7D65 DDR2";
+ case ARCH_EXID_SAMA7D65_D1G:
+ return "SAMA7D65 1Gb DDR3L SiP";
+ case ARCH_EXID_SAMA7D65_D2G:
+ return "SAMA7D65 2Gb DDR3L SiP";
+ case ARCH_EXID_SAMA7D65_D4G:
+ return "SAMA7D65 4Gb DDR3L SiP";
+ case ARCH_EXID_SAMA7D65_TA:
+ return "SAMA7D65 TA1000 SiP";
+ default:
+ return "Unknown CPU type";
+ }
+ else
+ return "Unknown CPU type10";
+}
diff --git a/arch/arm/mach-at91/include/mach/hardware.h
b/arch/arm/mach-at91/include/mach/hardware.h
index de89714b097..0b2ddbab3be 100644
--- a/arch/arm/mach-at91/include/mach/hardware.h
+++ b/arch/arm/mach-at91/include/mach/hardware.h
@@ -27,6 +27,8 @@
# include <asm/arch/sam9x7.h>
#elif defined(CONFIG_SAMA7G5)
# include <asm/arch/sama7g5.h>
+#elif defined(CONFIG_SAMA7D65)
+# include <asm/arch/sama7d65.h>
#elif defined(CONFIG_SAMA5D2)
# include <asm/arch/sama5d2.h>
#elif defined(CONFIG_SAMA5D3)
diff --git a/arch/arm/mach-at91/include/mach/sama7d65.h
b/arch/arm/mach-at91/include/mach/sama7d65.h
new file mode 100644
index 00000000000..8adc5c9a733
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama7d65.h
@@ -0,0 +1,107 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Chip-specific header file for the SAMA7D65 SoC
+ *
+ * Copyright (C) 2024 Microchip Technology, Inc. and its subsidiaries
+ */
+
+#ifndef __SAMA7D65_H__
+#define __SAMA7D65_H__
+
+/*
+ * Peripheral identifiers/interrupts.
+ */
+#define ATMEL_ID_FLEXCOM0 34
+#define ATMEL_ID_FLEXCOM1 35
+#define ATMEL_ID_FLEXCOM2 36
+#define ATMEL_ID_FLEXCOM3 37
+#define ATMEL_ID_FLEXCOM4 38
+#define ATMEL_ID_FLEXCOM5 39
+#define ATMEL_ID_FLEXCOM6 40
+#define ATMEL_ID_FLEXCOM7 41
+#define ATMEL_ID_FLEXCOM8 42
+
+#define ATMEL_ID_SDMMC0 75
+#define ATMEL_ID_SDMMC1 76
+#define ATMEL_ID_SDMMC2 77
+
+#define ATMEL_ID_PIT64B0 66
+#define ATMEL_ID_PIT64B ATMEL_ID_PIT64B0
+
+#define ATMEL_CHIPID_CIDR 0xe0020000
+#define ATMEL_CHIPID_EXID 0xe0020004
+/*
+ * User Peripherals physical base addresses.
+ */
+#define ATMEL_BASE_PIOA 0xe0014000
+#define ATMEL_BASE_PIOB (ATMEL_BASE_PIOA + 0x40)
+#define ATMEL_BASE_PIOC (ATMEL_BASE_PIOB + 0x40)
+#define ATMEL_BASE_PIOD (ATMEL_BASE_PIOC + 0x40)
+#define ATMEL_BASE_PIOE (ATMEL_BASE_PIOD + 0x40)
+
+#define ATMEL_PIO_PORTS 5
+
+#define CPU_HAS_PCR
+
+#define ATMEL_BASE_PMC 0xe0018000
+
+#define ATMEL_BASE_WDT 0xe001c000
+#define ATMEL_BASE_RSTC 0xe001d100
+#define ATMEL_BASE_WDTS 0xe001d180
+#define ATMEL_BASE_SCKCR 0xe001d500
+
+#define ATMEL_BASE_SDMMC0 0xe1204000
+#define ATMEL_BASE_SDMMC1 0xe1208000
+
+#define ATMEL_BASE_PIT64B0 0xe1800000
+
+#define ATMEL_BASE_FLEXCOM0 0xe1820000
+#define ATMEL_BASE_FLEXCOM1 0xe1824000
+#define ATMEL_BASE_FLEXCOM2 0xe1828000
+#define ATMEL_BASE_FLEXCOM3 0xe182c000
+#define ATMEL_BASE_FLEXCOM4 0xe2018000
+#define ATMEL_BASE_FLEXCOM5 0xe201C000
+#define ATMEL_BASE_FLEXCOM6 0xe2020000
+#define ATMEL_BASE_FLEXCOM7 0xe2024000
+#define ATMEL_BASE_FLEXCOM8 0xe281C000
+
+#define ATMEL_BASE_TZC400 0xe3000000
+
+#define ATMEL_BASE_UMCTL2 0xe3800000
+#define ATMEL_BASE_UMCTL2_MP 0xe38003f8
+#define ATMEL_BASE_PUBL 0xe3804000
+
+#define ATMEL_NUM_FLEXCOM 11
+#define ATMEL_PIO_PORTS 5
+
+#define ATMEL_BASE_PIT64BC ATMEL_BASE_PIT64B0
+
+#define ARCH_ID_SAMA7D65 0x80262100
+#define ARCH_EXID_SAMA7D65 0x00000080
+#define ARCH_EXID_SAMA7D65_DD2 0x00000010
+#define ARCH_EXID_SAMA7D65_D1G 0x00000018
+#define ARCH_EXID_SAMA7D65_D2G 0x00000020
+#define ARCH_EXID_SAMA7D65_D4G 0x00000028
+#define ARCH_EXID_SAMA7D65_TA 0x00000040
+
+#define cpu_is_sama7d65() (get_chip_id() == ARCH_ID_SAMA7D65)
+#define cpu_is_sama7d65_S() (cpu_is_sama7d65() && \
+ (get_extension_chip_id() == ARCH_EXID_SAMA7D65))
+#define cpu_is_sama7d65_DD2() (cpu_is_sama7d65() && \
+ (get_extension_chip_id() == ARCH_EXID_SAMA7D65_DD2))
+#define cpu_is_sama7d65_D1G() (cpu_is_sama7d65() && \
+ (get_extension_chip_id() == ARCH_EXID_SAMA7D65_D1G))
+#define cpu_is_sama7d65_D2G() (cpu_is_sama7d65() && \
+ (get_extension_chip_id() == ARCH_EXID_SAMA7D65_D2G))
+#define cpu_is_sama7d65_D4G() (cpu_is_sama7d65() && \
+ (get_extension_chip_id() == ARCH_EXID_SAMA7D65_D4G))
+#define cpu_is_sama7d65_TA() (cpu_is_sama7d65() && \
+ (get_extension_chip_id() == ARCH_EXID_SAMA7D65_TA))
+
+#ifndef __ASSEMBLY__
+unsigned int get_chip_id(void);
+unsigned int get_extension_chip_id(void);
+char *get_cpu_name(void);
+#endif
+
+#endif /* #ifndef __SAMA7D65_H__ */
--
2.45.2
