On Wed, Jun 11, 2025 at 10:59:32AM +0200, Quentin Schulz wrote: > From: Heiko Stuebner <[email protected]> > > Using snps,reset-* properties to handle the ethernet-phy resets is > deprecated and instead a real phy node should be used. > > Move the Ringneck phy-reset properties to such a node > > Signed-off-by: Heiko Stuebner <[email protected]> > Reviewed-by: Quentin Schulz <[email protected]> > Tested-by: Quentin Schulz <[email protected]> > Link: https://lore.kernel.org/r/[email protected] > Signed-off-by: Heiko Stuebner <[email protected]> > > [ upstream commit: e463625af7f92c4a9f097f7fb87f6baaad6e762a ] > > (cherry picked from commit 76d0d8e00c9ac845ca8d6cbe191cf015ca3a8c16) > --- > dts/upstream/src/arm64/rockchip/px30-ringneck.dtsi | 22 > +++++++++++++++++++--- > 1 file changed, 19 insertions(+), 3 deletions(-)
Reviewed-by: Sumit Garg <[email protected]> -Sumit > > diff --git a/dts/upstream/src/arm64/rockchip/px30-ringneck.dtsi > b/dts/upstream/src/arm64/rockchip/px30-ringneck.dtsi > index > e80412abec081f131271be933ee5805ee237b5af..185d5ba22fd5022a94de7a5a8d10bfe05f40ecf2 > 100644 > --- a/dts/upstream/src/arm64/rockchip/px30-ringneck.dtsi > +++ b/dts/upstream/src/arm64/rockchip/px30-ringneck.dtsi > @@ -83,9 +83,7 @@ > > /* On-module TI DP83825I PHY but no connector, enable in carrierboard */ > &gmac { > - snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; > - snps,reset-active-low; > - snps,reset-delays-us = <0 50000 50000>; > + phy-handle = <&dp83825>; > phy-supply = <&vcc_3v3>; > clock_in_out = "output"; > }; > @@ -348,6 +346,18 @@ > status = "okay"; > }; > > +&mdio { > + dp83825: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x0>; > + pinctrl-names = "default"; > + pinctrl-0 = <&phy_rst>; > + reset-assert-us = <50000>; > + reset-deassert-us = <50000>; > + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; > + }; > +}; > + > &pinctrl { > emmc { > emmc_reset: emmc-reset { > @@ -355,6 +365,12 @@ > }; > }; > > + ethernet { > + phy_rst: phy-rst { > + rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > leds { > module_led_pin: module-led-pin { > rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; > > -- > 2.49.0 >
