On 5/28/25 03:01, Tom Rini wrote:
> We have this binding file in both include/dt-bindings/ and
> dts/upstream/include/dt-bindings. These files are identical save for the
> fact that we do not have commit adb2424d0d05 ("dt-bindings: clock: add
> clock definitions for Ralink SoCs") from the kernel applied. However,
> this change is rather important and should not have been omitted here
> most likely. Remove our local copy to get in sync with upstream now.
>
> Signed-off-by: Tom Rini <tr...@konsulko.com>
> ---
> Cc: Eugen Hristev <eugen.hris...@linaro.org>
> Cc: Mihai Sain <mihai.s...@microchip.com>
>
> The full kernel commit log is at
> https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0b3292852863215825f88905b9dbafc3101e1d7e
> and so this sounds very important. Please let me know if this should go
> in master for v2025.07 (or Eugen, please pick it and send a PR). Thanks!
Hi Tom,
I do not see the connection with the Ralink SoCs. Maybe wrong commit
referenced ?
Anyway, on the slewrate bits, as of today we have DIS==0 and ENA==1 and
the driver treats them the same way. Hence DTs with DIS flag will have
the bit erased in the register
With the kernel bindings file, DIS==1 and ENA==0, but the driver still
considers DIS==0 and ENA==1 , so the DTs that have DIS as flags will get
the bit written in the register.
If we also port the driver patch then the driver will also consider
DIS==1 and ENA==0 , so the DTs with DIS flag will get the bit written in
the register.
So there is an important change by changing the bits values, as the
register eventually ends up with a different value.
The driver patch apparently just interprets the DIS/ENA bits
differently, but the end result is the same
Please correct me if my logic is wrong.
I would also believe testing on the sam9x60 would be required for the
slew rate change. From what I remember back then, slew rate change was
not needed in Uboot, but I might be wrong.
Eugen
> ---
> include/dt-bindings/pinctrl/at91.h | 49 ------------------------------
> 1 file changed, 49 deletions(-)
> delete mode 100644 include/dt-bindings/pinctrl/at91.h
>
> diff --git a/include/dt-bindings/pinctrl/at91.h
> b/include/dt-bindings/pinctrl/at91.h
> deleted file mode 100644
> index 3831f91fb3ba..000000000000
> --- a/include/dt-bindings/pinctrl/at91.h
> +++ /dev/null
> @@ -1,49 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0-only */
> -/*
> - * This header provides constants for most at91 pinctrl bindings.
> - *
> - * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD
> <plagn...@jcrosoft.com>
> - */
> -
> -#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
> -#define __DT_BINDINGS_AT91_PINCTRL_H__
> -
> -#define AT91_PINCTRL_NONE (0 << 0)
> -#define AT91_PINCTRL_PULL_UP (1 << 0)
> -#define AT91_PINCTRL_MULTI_DRIVE (1 << 1)
> -#define AT91_PINCTRL_DEGLITCH (1 << 2)
> -#define AT91_PINCTRL_PULL_DOWN (1 << 3)
> -#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
> -#define AT91_PINCTRL_OUTPUT (1 << 7)
> -#define AT91_PINCTRL_OUTPUT_VAL(x) ((x & 0x1) << 8)
> -#define AT91_PINCTRL_SLEWRATE (1 << 9)
> -#define AT91_PINCTRL_DEBOUNCE (1 << 16)
> -#define AT91_PINCTRL_DEBOUNCE_VAL(x) (x << 17)
> -
> -#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP |
> AT91_PINCTRL_DEGLITCH)
> -
> -#define AT91_PINCTRL_DRIVE_STRENGTH_DEFAULT (0x0 << 5)
> -#define AT91_PINCTRL_DRIVE_STRENGTH_LOW (0x1 << 5)
> -#define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
> -#define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
> -
> -#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
> -#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
> -
> -#define AT91_PIOA 0
> -#define AT91_PIOB 1
> -#define AT91_PIOC 2
> -#define AT91_PIOD 3
> -#define AT91_PIOE 4
> -
> -#define AT91_PERIPH_GPIO 0
> -#define AT91_PERIPH_A 1
> -#define AT91_PERIPH_B 2
> -#define AT91_PERIPH_C 3
> -#define AT91_PERIPH_D 4
> -
> -#define ATMEL_PIO_DRVSTR_LO 1
> -#define ATMEL_PIO_DRVSTR_ME 2
> -#define ATMEL_PIO_DRVSTR_HI 3
> -
> -#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */
