Reduce the TPL value a little to allow for a 256-byte bloblist to be
safely located above the stack in all phases.
Note that for most boards, SDRAM init happens in TPL so the SPL stack
ends up in DRAM, at address CONFIG_SPL_STACK_R_ADDR.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v5:
- Reword first paragraph to mention bloblist instead of other stacks
Changes in v2:
- Reword commit to mention comments from Jonas
arch/arm/mach-rockchip/rk3399/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig
b/arch/arm/mach-rockchip/rk3399/Kconfig
index b36c76f6d69..a31df823d1e 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -145,7 +145,7 @@ config TPL_LDSCRIPT
default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds"
config TPL_STACK
- default 0xff8effff
+ default 0xff8eff00
config TPL_TEXT_BASE
default 0xff8c2000
--
2.43.0
