Hi Beleswar

On 22/05/25 12:48, Beleswar Padhi wrote:
> Currently the MCU R5 processor ids and device ids are only defined for
> R5 SPL Stage. Expose these ids always so that A72 SPL can utilize this
> information to shutdown MCU R5 Core 1 when booted in Split mode.
> 
> Signed-off-by: Beleswar Padhi <b-pa...@ti.com>
> ---
>  arch/arm/mach-k3/include/mach/am62_hardware.h   | 4 ++--
>  arch/arm/mach-k3/include/mach/am62a_hardware.h  | 4 ++--
>  arch/arm/mach-k3/include/mach/am62p_hardware.h  | 4 ++--
>  arch/arm/mach-k3/include/mach/am64_hardware.h   | 9 +++++----
>  arch/arm/mach-k3/include/mach/am6_hardware.h    | 9 +++++----
>  arch/arm/mach-k3/include/mach/j721e_hardware.h  | 9 +++++----
>  arch/arm/mach-k3/include/mach/j721s2_hardware.h | 9 +++++----
>  arch/arm/mach-k3/include/mach/j722s_hardware.h  | 4 ++--
>  arch/arm/mach-k3/include/mach/j784s4_hardware.h | 9 +++++----
>  9 files changed, 33 insertions(+), 28 deletions(-)
> 
> diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h 
> b/arch/arm/mach-k3/include/mach/am62_hardware.h
> index bcbc4821c82..d44342d43d4 100644
> --- a/arch/arm/mach-k3/include/mach/am62_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
> @@ -158,8 +158,8 @@ static inline int k3_has_gpu(void)
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_AM62_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h 
> b/arch/arm/mach-k3/include/mach/am62a_hardware.h
> index cd61abe0185..f3fd736f31b 100644
> --- a/arch/arm/mach-k3/include/mach/am62a_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h
> @@ -90,8 +90,8 @@
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_AM62A_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am62p_hardware.h 
> b/arch/arm/mach-k3/include/mach/am62p_hardware.h
> index 95af5c5c547..a310b52b45d 100644
> --- a/arch/arm/mach-k3/include/mach/am62p_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am62p_hardware.h
> @@ -141,8 +141,8 @@ static inline int k3_get_a53_max_frequency(void)
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_AM62P_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am64_hardware.h 
> b/arch/arm/mach-k3/include/mach/am64_hardware.h
> index 44df887d5df..105b42986de 100644
> --- a/arch/arm/mach-k3/include/mach/am64_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am64_hardware.h
> @@ -50,19 +50,20 @@
>  
>  #define AM64X_DEV_RTI8                       127
>  #define AM64X_DEV_RTI9                       128
> -#define AM64X_DEV_R5FSS0_CORE0               121
> -#define AM64X_DEV_R5FSS0_CORE1               122
>  
>  static const u32 put_device_ids[] = {
>       AM64X_DEV_RTI9,
>       AM64X_DEV_RTI8,
>  };
>  
> +#endif
> +
> +#define AM64X_DEV_R5FSS0_CORE0               121
> +#define AM64X_DEV_R5FSS0_CORE1               122
> +
>  static const u32 put_core_ids[] = {
>       AM64X_DEV_R5FSS0_CORE1,
>       AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_DRA8_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h 
> b/arch/arm/mach-k3/include/mach/am6_hardware.h
> index 9913964c46b..8169584a372 100644
> --- a/arch/arm/mach-k3/include/mach/am6_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
> @@ -43,19 +43,20 @@
>  
>  #define AM6_DEV_MCU_RTI0                     134
>  #define AM6_DEV_MCU_RTI1                     135
> -#define AM6_DEV_MCU_ARMSS0_CPU0                      159
> -#define AM6_DEV_MCU_ARMSS0_CPU1                      245
>  
>  static const u32 put_device_ids[] = {
>       AM6_DEV_MCU_RTI0,
>       AM6_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define AM6_DEV_MCU_ARMSS0_CPU0                      159
> +#define AM6_DEV_MCU_ARMSS0_CPU1                      245
> +
>  static const u32 put_core_ids[] = {
>       AM6_DEV_MCU_ARMSS0_CPU1,
>       AM6_DEV_MCU_ARMSS0_CPU0,        /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_AM6_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h 
> b/arch/arm/mach-k3/include/mach/j721e_hardware.h
> index 2b5ec771e18..5bef309af0a 100644
> --- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
> @@ -41,19 +41,20 @@
>  
>  #define J721E_DEV_MCU_RTI0                   262
>  #define J721E_DEV_MCU_RTI1                   263
> -#define J721E_DEV_MCU_ARMSS0_CPU0            250
> -#define J721E_DEV_MCU_ARMSS0_CPU1            251
>  
>  static const u32 put_device_ids[] = {
>       J721E_DEV_MCU_RTI0,
>       J721E_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define J721E_DEV_MCU_ARMSS0_CPU0            250
> +#define J721E_DEV_MCU_ARMSS0_CPU1            251
> +
>  static const u32 put_core_ids[] = {
>       J721E_DEV_MCU_ARMSS0_CPU1,
>       J721E_DEV_MCU_ARMSS0_CPU0,      /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_J721E_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j721s2_hardware.h 
> b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> index 8daea82a77e..82f076a45e0 100644
> --- a/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j721s2_hardware.h
> @@ -41,19 +41,20 @@
>  
>  #define J721S2_DEV_MCU_RTI0                  295
>  #define J721S2_DEV_MCU_RTI1                  296
> -#define J721S2_DEV_MCU_ARMSS0_CPU0           284
> -#define J721S2_DEV_MCU_ARMSS0_CPU1           285
>  
>  static const u32 put_device_ids[] = {
>       J721S2_DEV_MCU_RTI0,
>       J721S2_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define J721S2_DEV_MCU_ARMSS0_CPU0           284
> +#define J721S2_DEV_MCU_ARMSS0_CPU1           285
> +
>  static const u32 put_core_ids[] = {
>       J721S2_DEV_MCU_ARMSS0_CPU1,
>       J721S2_DEV_MCU_ARMSS0_CPU0,     /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_J721S2_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j722s_hardware.h 
> b/arch/arm/mach-k3/include/mach/j722s_hardware.h
> index 8d0bec22068..0c695134c28 100644
> --- a/arch/arm/mach-k3/include/mach/j722s_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j722s_hardware.h
> @@ -76,8 +76,8 @@
>  
>  static const u32 put_device_ids[] = {};
>  
> -static const u32 put_core_ids[] = {};
> -
>  #endif
>  
> +static const u32 put_core_ids[] = {};
> +
>  #endif /* __ASM_ARCH_J722S_HARDWARE_H */
> diff --git a/arch/arm/mach-k3/include/mach/j784s4_hardware.h 
> b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> index 0ffe238cdae..29a894baed3 100644
> --- a/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> +++ b/arch/arm/mach-k3/include/mach/j784s4_hardware.h
> @@ -41,19 +41,20 @@
>  
>  #define J784S4_DEV_MCU_RTI0                  367
>  #define J784S4_DEV_MCU_RTI1                  368
> -#define J784S4_DEV_MCU_ARMSS0_CPU0           346
> -#define J784S4_DEV_MCU_ARMSS0_CPU1           347
>  
>  static const u32 put_device_ids[] = {
>       J784S4_DEV_MCU_RTI0,
>       J784S4_DEV_MCU_RTI1,
>  };
>  
> +#endif
> +
> +#define J784S4_DEV_MCU_ARMSS0_CPU0           346
> +#define J784S4_DEV_MCU_ARMSS0_CPU1           347
> +
>  static const u32 put_core_ids[] = {
>       J784S4_DEV_MCU_ARMSS0_CPU1,
>       J784S4_DEV_MCU_ARMSS0_CPU0,     /* Handle CPU0 after CPU1 */
>  };
>  
> -#endif
> -
>  #endif /* __ASM_ARCH_J784S4_HARDWARE_H */

Reviewed-by: Neha Malcom Francis <n-fran...@ti.com>

-- 
Thanking You
Neha Malcom Francis

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