Am 15.05.25 um 14:38 schrieb Manorit Chawdhry:
The commit 79d91e77f4c2 ("clk: ti: clk-k3-pll: Add additional robustness steps to the PLL sequence") introduced a change which requires the main_timer0 to not rely on it's own clocks which anyways was wrong.Fix it by removing the clock dependency for it, also while at it, move it from u-boot.dtsi to R5 as that is the only entity that should require it as DM isn't up. Fixes: 5d1aac358f3c ("arm: dts: k3-*-r5: Remove clocks from mcu_timer0") Signed-off-by: Manorit Chawdhry <m-chawd...@ti.com>
Acked-by: Wadim Egorov <w.ego...@phytec.de>
--- arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi | 5 ----- arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts | 9 +++++++++ 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi b/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi index f922f4b4781d9a3aed543ba5c4ebfb3ab879476a..73255a18e9b1526eda50e43786ccc3e122d54060 100644 --- a/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi +++ b/arch/arm/dts/k3-am62a7-phyboard-lyra-rdk-u-boot.dtsi @@ -13,7 +13,6 @@ / { chosen { stdout-path = "serial2:115200n8"; - tick-timer = &main_timer0; };aliases {@@ -157,10 +156,6 @@ bootph-all; };-&main_timer0 {- bootph-all; -}; - &main_uart0 { bootph-all; }; diff --git a/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts b/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts index 0060c7a69349a31e142c40806c372ed2fccdf7ea..63b7864a46969f83571269e3db7bf7670228362b 100644 --- a/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts +++ b/arch/arm/dts/k3-am62a7-r5-phycore-som-2gb.dts @@ -88,6 +88,15 @@ ti,secure-host; };+&main_timer0 {+ /delete-property/ clocks; + /delete-property/ clocks-names; + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-parents; + clock-frequency = <25000000>; + bootph-pre-ram; +}; + &main_bcdma { ti,sci = <&dm_tifs>; };
