Hello Manorit, On Thu, Nov 21, 2024 at 05:32:51PM +0530, Manorit Chawdhry wrote: > Updated PLL driver sequencing requires us to use udelay in the PLL > driver as there is no poll bit to get the status of operations. > tick-timer(mcu_timer0/main_timer0) setting up the clocks for itself is > something that won't work as the PLL driver will be using udelay and > PLLs are configured during clock probe which would end up in a recursive > probe. > > tick-timer being used by K3 devices are configured by ROM and we really > don't need to configure any of the clocks. > > Remove the clock dependency from R5 stage as we don't need to setup > clocks for it. > > Signed-off-by: Manorit Chawdhry <m-chawd...@ti.com> > --- > arch/arm/dts/k3-am62-lp-sk-u-boot.dtsi | 10 ---------- > arch/arm/dts/k3-am62-r5-lp-sk.dts | 9 +++++++++ > arch/arm/dts/k3-am625-r5-sk.dts | 9 +++++++++ > arch/arm/dts/k3-am625-sk-u-boot.dtsi | 10 ---------- > arch/arm/dts/k3-am62a7-r5-sk.dts | 10 ++++++++++ > arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 5 ----- > arch/arm/dts/k3-am62p5-r5-sk.dts | 8 ++++++++ > arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 4 ++++ > arch/arm/dts/k3-j721e-r5.dtsi | 6 +++++- > arch/arm/dts/k3-j721s2-r5.dtsi | 4 ++++ > arch/arm/dts/k3-j722s-r5-evm.dts | 8 ++++++++ > arch/arm/dts/k3-j784s4-r5.dtsi | 5 ++++- > 12 files changed, 61 insertions(+), 27 deletions(-)
This change should have been done to any board using any of those SoC, correct? verdin-am62 was not changed, for example. Francesco
