> -----Original Message-----
> From: Ravulapalli, Naresh Kumar <naresh.kumar.ravulapa...@altera.com>
> Sent: Friday, March 7, 2025 5:38 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <ma...@denx.de>; Simon Goldschmidt
> <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong
> <tien.fong.c...@altera.com>; Jagan Teki <ja...@amarulasolutions.com>;
> Tom Rini <tr...@konsulko.com>; Ravulapalli, Naresh Kumar
> <naresh.kumar.ravulapa...@altera.com>
> Subject: [PATCH] drivers: spi: Fix data loss issue in QSPI
>
> QSPI driver performs chip select operation before every read/write access.
> During this operation, driver needs to enable and disable the QSPI controller.
> This may cause data loss if there is inadvertent halting of any ongoing
> read/write operation. To avoid this scenario, waiting for the QSPI status to
> be
> idle before next read/write operation is implemented.
>
> Signed-off-by: Naresh Kumar Ravulapalli
> <nareshkumar.ravulapa...@altera.com>
> ---
> drivers/spi/cadence_qspi_apb.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/spi/cadence_qspi_apb.c
> b/drivers/spi/cadence_qspi_apb.c index f2f69cf9f1..b579699d2e 100644
> --- a/drivers/spi/cadence_qspi_apb.c
> +++ b/drivers/spi/cadence_qspi_apb.c
> @@ -747,6 +747,10 @@ cadence_qspi_apb_indirect_read_execute(struct
> cadence_spi_priv *priv,
> goto failrd;
> }
>
> + /* Wait til QSPI is idle */
> + if (!cadence_qspi_wait_idle(priv->regbase))
> + return -EIO;
> +
> return 0;
>
> failrd:
> @@ -914,6 +918,11 @@ cadence_qspi_apb_indirect_write_execute(struct
> cadence_spi_priv *priv,
>
> if (bounce_buf)
> free(bounce_buf);
> +
> + /* Wait til QSPI is idle */
> + if (!cadence_qspi_wait_idle(priv->regbase))
> + return -EIO;
> +
> return 0;
>
> failwr:
> --
> 2.35.3
Reviewed-by: Tien Fong Chee <tien.fong.c...@intel.com>
Best regards,
Tien Fong
