This patch set adds support for falcon boot on AM62a, 62p and 62x by bypassing A53 SPL and U-boot.
Existing Boot flow: R5 SPL -> ATF -> A53 SPL -> U-Boot -> Linux Kernel Updated flow: R5 SPL -> ATF -> Linux Kernel U-boot's falcon flow expects the jump from SPL to kernel to happen on the same core which is not directly applicable for our heterogeneous platforms since ATF, OPTEE and other non SPL binaries from tispl.bin should be loaded before the kernel by the R5 SPL. So we have to use a non std flow to bypass A53 SPL and U-Boot, we first load the newly added tispl_falcon.bin instead of tispl.bin which lacks u-boot-spl.bin (A53's SPL) and the corresponding fdt. This sets up dm, tifs, optee and atf. Once loaded, we load the kernel and the dtb (with fixups) at ATF's PRELOADED_BL33_BASE and K3_HW_CONFIG_BASE. NOTE: Since we're now using the SPL to load the kernel and kernel expects a 2MiB aligned load address, the existing PRELOADED_BL33_BASE has to be changed for ATF to 0x82000000 with K3_HW_CONFIG_BASE set to 0x88000000 for the DTB. Signed-off-by: Anshul Dalal <ansh...@ti.com> --- Changes in v6: * Added A53 build steps in docs * Had git add SVGs as text instead of blob * Added memory map for standard boot flow v5: https://lore.kernel.org/u-boot/20250425145644.2228186-1-ansh...@ti.com/ Changes in v5: * Added documentation * Moved address for kernel and dtb to 0x82000000 and 0x88000000 respectively v4: https://lore.kernel.org/u-boot/20250416074515.1452854-1-ansh...@ti.com/ Changes in v4: * Move emmc boot fixes to saperate patch * Update load address for kernel to 0x82200000 * Add jump_stub config v3: https://lore.kernel.org/u-boot/20250403215910.1292922-1-ansh...@ti.com/ Changes in v3: * Make tifs load and entry address consistent with tispl for am62a and 62p * Update loadables order to be same as tispl.bin * Use rootfs for boot instead of boot partition * Disable SPL_HAS_BOOTZ to save space * Add default dtbs for each board in Kconfig * Fix fdt totalsize in the header before applying fixups * Update Makefile to clean tispl_falcon.bin on `make clean` v2: https://lore.kernel.org/u-boot/20250311095758.3383047-1-ansh...@ti.com/ Changes in v2: * Move to CONFIG_SYS_SPI_* * Remove the need for CMD_BOOTI v1: https://lore.kernel.org/u-boot/20250307075541.2571104-1-ansh...@ti.com/ Andreas Dannenberg (1): arch: arm: mach-k3: r5: am62ax: Update SoC auto-gen data to enable CPSW boot Anshul Dalal (1): spl: Kconfig: allow K3 devices to use falcon mode Daniel Schultz (1): arch: arm: dts: k3-am62a7-phyboard-lyra-rdk-u-boot: Disable Ethernet2 Nathan Morrisson (2): arch: arm: mach-k3: am62a7: Probe CPSW NUSS in board_init_f() board: phytec: phycore_am62ax: Share ethernet resources with boot r5 core Wadim Egorov (4): arm: dts: k3-am625-phyboard-lyra-rdk: Add boot phase tag to phy_gmii_sel configs: Add phycore_am62x_r5_ethboot_defconfig configs: phycore_am62x_a53_defconfig: Update for ethernet boot configs: Add phycore_am62ax_r5_ethboot_defconfig -- 2.49.0
