From: Patrick Delaunay <patrick.delau...@foss.st.com>
The STM32MP25 revision ID are now defined with the OTP102, this patch
implements this new system.
Signed-off-by: Patrick Delaunay <patrick.delau...@foss.st.com>
Signed-off-by: Patrice CHOTARD <patrice.chot...@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chot...@foss.st.com>
---
(no changes since v1)
arch/arm/mach-stm32mp/include/mach/stm32.h | 1 +
.../arm/mach-stm32mp/include/mach/sys_proto.h | 11 +++++++++-
arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c | 21 ++++++++++++++-----
3 files changed, 27 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h
b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 156009f51e3..a9ac49bc5d2 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -212,6 +212,7 @@ enum forced_boot_mode {
#ifdef CONFIG_STM32MP25X
#define BSEC_OTP_SERIAL 5
#define BSEC_OTP_RPN 9
+#define BSEC_OTP_REVID 102
#define BSEC_OTP_PKG 122
#define BSEC_OTP_BOARD 246
#define BSEC_OTP_MAC 247
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 2a65efc0a50..0770f0a0cf6 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -58,6 +58,7 @@ u32 get_cpu_type(void);
/* return CPU_DEV constants */
u32 get_cpu_dev(void);
+/* Silicon revision = REV_ID[15:0] of Device Version */
#define CPU_REV1 0x1000
#define CPU_REV1_1 0x1001
#define CPU_REV1_2 0x1003
@@ -65,7 +66,15 @@ u32 get_cpu_dev(void);
#define CPU_REV2_1 0x2001
#define CPU_REV2_2 0x2003
-/* return Silicon revision = REV_ID[15:0] of Device Version */
+/* OTP revision ID = 6 bits : 3 for Major / 3 for Minor */
+#define OTP_REVID_1 0b001000
+#define OTP_REVID_1_1 0b001001
+#define OTP_REVID_1_2 0b001010
+#define OTP_REVID_2 0b010000
+#define OTP_REVID_2_1 0b010001
+#define OTP_REVID_2_2 0b010010
+
+/* return SoC revision = Silicon revision (STM32MP1) or OTP revision ID
(STM32MP2)*/
u32 get_cpu_rev(void);
/* Get Package options from OTP */
diff --git a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
index 7f896a0d65d..ac229bdf7cc 100644
--- a/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
+++ b/arch/arm/mach-stm32mp/stm32mp2/stm32mp25x.c
@@ -15,8 +15,10 @@
#define SYSCFG_DEVICEID_OFFSET 0x6400
#define SYSCFG_DEVICEID_DEV_ID_MASK GENMASK(11, 0)
#define SYSCFG_DEVICEID_DEV_ID_SHIFT 0
-#define SYSCFG_DEVICEID_REV_ID_MASK GENMASK(31, 16)
-#define SYSCFG_DEVICEID_REV_ID_SHIFT 16
+
+/* Revision ID = OTP102[5:0] 6 bits : 3 for Major / 3 for Minor*/
+#define REVID_SHIFT 0
+#define REVID_MASK GENMASK(5, 0)
/* Device Part Number (RPN) = OTP9 */
#define RPN_SHIFT 0
@@ -46,7 +48,7 @@ u32 get_cpu_dev(void)
u32 get_cpu_rev(void)
{
- return (read_deviceid() & SYSCFG_DEVICEID_REV_ID_MASK) >>
SYSCFG_DEVICEID_REV_ID_SHIFT;
+ return get_otp(BSEC_OTP_REVID, REVID_SHIFT, REVID_MASK);
}
/* Get Device Part Number (RPN) from OTP */
@@ -164,12 +166,21 @@ void get_soc_name(char name[SOC_NAME_SIZE])
}
/* REVISION */
switch (get_cpu_rev()) {
- case CPU_REV1:
+ case OTP_REVID_1:
cpu_r = "A";
break;
- case CPU_REV2:
+ case OTP_REVID_1_1:
+ cpu_r = "Z";
+ break;
+ case OTP_REVID_2:
cpu_r = "B";
break;
+ case OTP_REVID_2_1:
+ cpu_r = "Y";
+ break;
+ case OTP_REVID_2_2:
+ cpu_r = "X";
+ break;
default:
break;
}
--
2.25.1
